TFT Substrate Organic Layer Planarization for Storage Electrode
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Solution Overview
Problem
The existing methods for manufacturing thin film transistor (TFT) substrates result in a rugged surface of the organic layer overlapping with the storage electrode, leading to capacitance variations and flickering issues in liquid crystal display (LCD) devices due to the etching of the passivation and gate insulating layers, which can cause short-circuits and inconsistent display performance.
Innovation Solution
A method is developed to manufacture TFT substrates by forming a passivation layer, partially removing the organic layer overlapping with the storage electrode to create a concave portion, planarizing the bottom surface, and then forming an opening on the passivation layer to remove the planarized organic layer, thereby smoothing the surface and preventing etching of the storage electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the organic layer is deposited over the storage electrode using a single mask process, then the manufacturing process is simplified, but the organic layer develops a rugged surface that causes capacitance variations and flickering
Solution Approach 1:
The patent divides the manufacturing process into two separate mask steps: first forming the storage electrode pattern, then forming the organic layer pattern. This segmentation allows independent optimization of each layer's pattern quality, eliminating the rugged surface issue while maintaining manufacturing efficiency.
Solution Approach 2:
The storage electrode pattern is formed first as a preliminary step before depositing the organic layer. This preliminary action allows the organic layer to be deposited on a pre-defined, flat electrode surface, preventing the rugged surface formation that occurs when both are formed simultaneously.
2Productivity
If the rugged surface of the organic layer is left as-is, then the manufacturing process is completed faster, but the passivation and gate insulating layers are etched during subsequent processing, causing short-circuits
Solution Approach 1:
The organic layer pattern is formed in advance with precise definition before subsequent etching processes. This preliminary action ensures that the organic layer acts as a reliable mask during passivation and gate insulating layer etching, preventing short-circuits while maintaining manufacturing speed.
Solution Approach 2:
The patent uses plasma etching (a pneumatic process) to remove the organic layer in a controlled manner, creating a clean, flat surface that prevents subsequent etching issues without compromising manufacturing efficiency.
3Stability of the object's composition
If the semiconductor layer is removed from under the storage electrode, then capacitance stability is improved, but the manufacturing complexity increases due to additional etching steps
Solution Approach 1:
The patent extracts (removes) the semiconductor layer from the region under the storage electrode through targeted etching. This extraction eliminates the capacitance instability caused by the semiconductor layer while the subsequent organic layer deposition restores the necessary insulation, achieving capacitance stability without excessive complexity.
Data Source
AI summary
A method of manufacturing a thin film transistor (TFT) substrate to minimize a rugged surface of an organic layer overlapping with a storage electrode is provided. The method includes forming a passivation layer on a substrate having a storage electrode and an organic layer covering the passivation layer, forming a concave portion by partially removing a portion of the organic layer that overlaps with the storage electrode, planarizing a rugged pattern located on the bottom of the concave portion, and forming an opening extending to a surface of the passivation layer by removing the planarized organic layer from the concave portion.