Thin Film Transistor Substrate Parasitic Capacitance Reduction
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Solution Overview
Problem
In high-density flat panel displays, parasitic capacitance at the crossing points between scan lines and data lines increases, leading to higher load on data lines and reduced video quality, and existing thin film transistor structures are prone to degradation due to external light exposure.
Innovation Solution
A thin film transistor substrate structure is implemented with additional insulating layers, including a buffer layer and a gate insulating layer, between the scan line and the data line, and a top gate structure with light shielding layers to minimize parasitic capacitance and protect the oxide semiconductor material from external light.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional insulating layers are added between scan line and data line to reduce parasitic capacitance, then video quality and driving speed are improved, but device complexity increases
Solution Approach 1:
The insulating layer is segmented into multiple functional layers: buffer layer (first insulating layer), gate insulating layer (second insulating layer), and intermediate insulating layer (third insulating layer). Each layer serves a specific purpose in reducing parasitic capacitance while maintaining manufacturing feasibility.
Solution Approach 2:
The patent introduces additional layers in the vertical dimension between the scan line and data line. By stacking multiple insulating layers (buffer layer, gate insulating layer, intermediate insulating layer) vertically, the parasitic capacitance is reduced without increasing horizontal space requirements.
2Reliability
If top gate structure with light shielding layers is used to protect oxide semiconductor material, then transistor stability is improved, but manufacturing complexity increases
Solution Approach 1:
The light shielding layer is formed as part of the gate electrode structure before the semiconductor layer is deposited. This preliminary formation of the light shielding function integrated with the gate electrode simplifies the manufacturing process compared to adding separate light shielding layers after semiconductor deposition.
Solution Approach 2:
The light shielding function is merged with the gate electrode structure. The gate electrode is formed with a light shielding material or coated with light shielding layer, combining two functions (electrical gating and light protection) into a single structural element.
3Speed
If buffer layer and gate insulating layer are added between scan line and data line, then parasitic capacitance is reduced and high-speed driving is enabled, but number of manufacturing steps increases
Solution Approach 1:
The buffer layer serves multiple functions: it provides electrical insulation between the scan line and data line to reduce parasitic capacitance, and it also serves as a base layer for subsequent gate electrode formation. The gate insulating layer simultaneously provides insulation and serves as the gate dielectric for the thin film transistor.
Data Source
AI summary
The present disclosure relates to a thin film transistor substrate for flat panel display including an organic light emitting diode display. The present disclosure provides a device comprising: a substrate; a scan line extending in a first direction on the substrate; a buffer layer on the scan line; a semiconductor layer extending in a second direction and crossing the scan line on the buffer layer; a gate insulating layer on the semiconductor layer; a gate electrode connected to the scan line, and extending in the first direction and crossing the semiconductor layer on the gate insulating layer; an intermediate insulating layer on the gate electrode; a data line crossing the scan line on the intermediate insulating layer; a source electrode branching from the data line and contacting a first side of the semiconductor layer; and a drain electrode facing the source electrode and contacting a second side of the semiconductor layer.