TFT Substrate Static Discharge via Peripheral Capacitors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Static electricity during the fabrication of thin film transistor substrates for liquid crystal display devices leads to defects such as shorts between gate, data, and common voltage lines, despite the presence of static electricity prevention circuits, as there are limited pathways for static discharge.
Innovation Solution
A thin film transistor substrate design with a common voltage line and grounding line formed at the edge of a non-display area, covered by insulating layers, and an electrode layer made of ITO or IZO, which creates capacitors to buffer static electricity, minimizing its impact on the display area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If testing wires are provided on the peripheral area for MPS test, then electric defects can be checked, but static electricity pathways are cut when the mother substrate is divided, causing defects such as shorts between gate wire, data wire, and common voltage line
Solution Approach 1:
The substrate is divided into a display area and a non-display area, with testing wires and static electricity prevention circuits located in the peripheral non-display area. This segmentation allows the testing function to be separated from the display function, enabling static electricity discharge pathways to be maintained without interfering with the display area.
Solution Approach 2:
Static electricity prevention circuits are formed in advance in the peripheral area before the substrate is divided into individual display areas. This preliminary action ensures that discharge pathways are already established and can handle static electricity that may occur during subsequent fabrication and handling processes.
2Reliability
If static electricity prevention circuit is provided, then defects due to static electricity may be prevented, but there are limited pathways for static discharge and multiple ways static electricity may be introduced
Solution Approach 1:
The peripheral area serves multiple functions: it contains the testing wires for MPS test, provides static electricity discharge pathways through dedicated circuits, and acts as a buffer zone. This multi-functionality reduces the need for separate dedicated structures for each function, simplifying the overall design while maintaining reliability.
Solution Approach 2:
The peripheral area acts as an intermediary zone between the display area and the external environment. It provides a controlled environment for static electricity discharge away from the sensitive display area, mediating the interaction between static electricity threats and the display functionality.
3Reliability
If common voltage line and grounding line are formed at the edge of non-display area, then capacitors are created to buffer static electricity, but the structure becomes more complex
Solution Approach 1:
The common voltage line and grounding line are merged into a single configuration at the edge of the non-display area, forming capacitive structures that serve both voltage reference and static electricity discharge functions. This merging reduces the number of separate structures needed while maintaining the buffering capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The capacitors effectively absorb and reduce static electricity, thereby minimizing defects caused by static discharge on the thin film transistor substrate, enhancing the reliability of the fabrication process.
Implementation Method 1
an electrode layer formed on the insulating layer corresponded to the common voltage line for MPS (mass production system) test and the grounding line for MPS (mass production system) test
Data Source
AI summary
According to an embodiment, there is provided a fabricating method for a thin film transistor substrate divided into a display area displaying images and a non-display area beside the display area, the fabricating method comprising: forming a gate wire in the display area, a common voltage line for a MPS (mass production system) test in the non-display area, and a grounding line for the MPS test in the non-display area with same material at the same time; forming a gate insulating layer covering the gate wire and a first insulating layer covering the common voltage line for the MPS test and the grounding line for the MPS test with same material at the same time; forming a data wire crossing the gate wire and defining a pixel area in the display area; and forming a pixel electrode in the pixel area and an electrode layer on the first insulating layer corresponding to the common voltage line for the MPS test and the grounding line for the MPS test with same material at the same time.