TFT Substrate Fabrication via Three-Mask Integration
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Solution Overview
Problem
The manufacturing process of thin film transistor substrates for liquid crystal display devices is complex and costly due to the requirement of multiple mask processes, particularly the semiconductor process.
Innovation Solution
A simplified process for fabricating a thin film transistor substrate using three mask processes, involving the formation of a gate line, source/drain metal pattern, and pixel electrode, with a passivation film forming a border with the pixel electrode to protect the underlying patterns, thereby reducing the number of mask processes and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple mask processes are used to form gate line, data line, and pixel electrode separately, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the formation of gate line, data line, and pixel electrode into a single mask process by forming them as an integrated conductive pattern layer. This merging of multiple patterning steps into one process reduces manufacturing complexity while maintaining the required precision through careful design of the conductive pattern layout that defines all three elements simultaneously.
Solution Approach 2:
The conductive pattern layer serves multiple functions: it forms the gate line, data line, and pixel electrode all in one structure. This multi-functional design allows a single mask process to accomplish what traditionally required multiple separate processes, thereby reducing device complexity while preserving manufacturing precision through the unified structural design.
2Manufacturing precision
If multiple mask processes are used for thin film transistor fabrication, then manufacturing precision is improved, but productivity decreases due to increased process time
Solution Approach 1:
By merging the patterning of gate line, data line, and pixel electrode into a single mask process, the total process time is significantly reduced compared to performing separate mask processes for each element. This consolidation maintains manufacturing precision through the integrated pattern design while improving productivity by eliminating redundant process steps.
Solution Approach 2:
The conductive pattern layer is designed and formed in advance to simultaneously define all three conductive elements (gate line, data line, pixel electrode). This preliminary action of creating a multi-functional pattern structure allows subsequent processing steps to proceed more efficiently, improving productivity while maintaining the precision required for proper device functionality.
3Reliability
If passivation film is formed to cover the entire surface, then reliability is improved by protecting all patterns, but manufacturing complexity increases due to additional patterning steps
Solution Approach 1:
The passivation film is applied selectively only to regions where protection is needed, rather than covering the entire surface uniformly. This local application approach protects the underlying patterns in critical areas while avoiding unnecessary material deposition and complex patterning steps in other areas, thereby maintaining reliability where required without increasing overall manufacturing complexity.
Data Source
AI summary
A liquid crystal display device according to an embodiment of the present invention a includes: a gate line on a substrate; a data line crossing the gate line to define a pixel area; a thin film transistor connected to the gate line and the data line; a semiconductor pattern extended from the thin film transistor to overlap along the data line; a gate insulating pattern that overlaps along the semiconductor pattern to insulate the gate line and the data line; a pixel electrode in the pixel area spaced apart from the gate line and the data line and connected to the thin film transistor; and a passivation film formed in an area where the pixel electrode is not present to form a border with the pixel electrode.