Thin Film Transistor Substrate With Varying Semiconductor Thickness
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Solution Overview
Problem
The series impedance between source/drain electrodes and the semiconductor layer in top gate thin-film transistors is excessively high, leading to insufficient charging of storage capacitors and high power consumption in display devices.
Innovation Solution
A thin-film transistor substrate with a semiconductor layer having regions of varying thicknesses, where the first region is thicker than the second and third regions, reducing series impedance and maintaining on-current performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a top gate structure is used, then the TFT size is reduced and parasitic capacitance is reduced, but the series impedance between source/drain electrodes and semiconductor layer becomes excessively high
Solution Approach 1:
The semiconductor layer is designed with different thicknesses in different regions: a first thickness in the channel region and a second thickness in the source/drain contact regions. This local variation in thickness creates different electrical properties in different areas, allowing the channel region to maintain proper transistor characteristics while the contact regions provide lower series impedance for better current flow.
Solution Approach 2:
Instead of changing the planar dimensions or adding more layers, the invention modifies the vertical dimension (thickness) of the semiconductor layer specifically in the source/drain contact regions. This dimensional change in the vertical direction provides a direct path to reduce series impedance without affecting the overall TFT footprint or adding structural complexity.
2Manufacturing precision
If a top gate structure is used, then higher resolution is achieved, but on current decreases due to high series impedance
Solution Approach 1:
The semiconductor layer thickness is locally optimized: thinner in source/drain contact regions to reduce series impedance and enable higher on current, while maintaining the required thickness in the channel region for proper transistor operation and high resolution display performance.
3Volume of moving object
If a top gate structure is used, then device miniaturization is achieved, but storage capacitor charging becomes insufficient
Solution Approach 1:
By making the semiconductor layer thinner specifically in the source/drain contact regions, the invention reduces series impedance at these locations, enabling sufficient current flow to properly charge the storage capacitor while maintaining the miniaturized device structure.
Data Source
AI summary
A thin-film transistor substrate is disclosed, which comprises a base layer; a semiconductor layer disposed on the base layer; a source electrode and a drain electrode disposed on the semiconductor layer; and a gate electrode disposed on the base layer and corresponding to the semiconductor layer; wherein the semiconductor layer includes a first region, a second region, and a third region, in which the first region corresponds to the gate electrode layer, the second region corresponds to the source electrode, and the third region corresponds to the drain electrode; and wherein the first region has a first thickness, the second region has a second thickness, and the third region has a third thickness, and the first thickness is greater than the second thickness or the third thickness.