Polysilicon TFT Third Doped Region Reduces Hot Carrier Stress
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Solution Overview
Problem
Polycrystalline silicon thin film transistors (TFTs) face issues with silicon crystal damage during the doping process, leading to hot carrier stress and reduced electron mobility, which increases OFF current and instability in display devices.
Innovation Solution
A thin film transistor design with a semiconductor active layer comprising a first and second polycrystalline silicon layer, where a third doped region with varying doping concentrations and thicknesses is introduced between the doped regions, and a gate electrode is insulated to prevent current leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a doping process is performed on polycrystalline silicon to form source and drain regions, then the TFT can achieve proper electrical functionality, but silicon crystal damage occurs leading to hot carrier stress and increased OFF current
Solution Approach 1:
The patent divides the semiconductor active layer into multiple distinct regions: a first doped region (source), a second doped region (drain), and a third undoped region positioned between them. This segmentation prevents direct contact between heavily doped regions, reducing hot carrier stress while maintaining proper electrical functionality through controlled carrier flow paths.
Solution Approach 2:
The third undoped region acts as an intermediary buffer zone between the first and second doped regions. This intermediate region prevents direct interaction between high-concentration dopants, reducing crystal damage and hot carrier stress while still allowing necessary electrical conduction through the channel.
2Ease of operation
If electrons flow from source to drain in a damaged silicon crystal, then current conduction is achieved, but hot carrier stress is generated reducing electron mobility and increasing OFF current
Solution Approach 1:
The patent applies different doping concentrations to different regions: heavily doped first and second regions for effective source/drain contact, and an undoped third region in the middle to minimize hot carrier stress. This local differentiation optimizes both current conduction in doped regions and electron mobility in the undoped channel region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively prevents OFF current leakage and enhances the stability of the TFT operation, reducing hot carrier stress and improving electron mobility.
Implementation Method 1
The gate electrode may be insulated from the semiconductor active layer and overlap with the third doped region and the undoped region
Data Source
AI summary
A thin film transistor (TFT) includes a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode. The semiconductor active layer includes a first doped region as a source region, a second doped region as a drain region, an undoped region between the first and second doped regions. A third doped region is disposed between the second doped region and the undoped region. The gate electrode is insulated from the semiconductor active layer and overlaps the third doped region and the undoped region. The source electrode and the drain electrode are connected to the first and second doped regions.