TFT Array Substrate with Translucent Gate Electrode
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Solution Overview
Problem
The manufacturing process of flat panel display devices, such as organic light-emitting display devices, is complex and costly due to the need for multiple mask processes, which increases the time and expense of producing substrates with fine patterns of thin film transistors, capacitors, and wirings.
Innovation Solution
A thin film transistor (TFT) array substrate is designed with a simplified manufacturing process, featuring a translucent electrode interposed between gate insulating layers, a pixel electrode formed from transparent conductive oxide, and a capacitor with a semiconductor doped lower electrode and translucent metal upper electrode, allowing for reduced mask processes and improved signal transmission characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple mask processes are used to form fine patterns of TFTs, capacitors, and wirings, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the pixel electrode and gate electrode into a single conductive layer structure, and integrates the capacitor electrode with the gate electrode. This merging of previously separate components formed by different mask processes reduces the total number of mask steps while maintaining the required fine pattern precision through a simplified manufacturing process
Solution Approach 2:
The gate electrode serves dual functions as both the gate electrode for TFT control and as one of the capacitor electrodes. Additionally, the pixel electrode and gate electrode share a common conductive layer material and formation process. This multi-functionality allows a single structure to fulfill multiple roles that previously required separate components and processes, thereby reducing device complexity
2Manufacturing precision
If multiple mask processes are used to form fine patterns, then manufacturing precision is improved, but manufacturing time increases
Solution Approach 1:
The patent merges the formation of pixel electrode and gate electrode into a single mask process step by using the same conductive layer material and simultaneous patterning. This consolidation eliminates multiple sequential mask processes, significantly reducing manufacturing time while preserving the precision of fine pattern formation through optimized single-step patterning
3Reliability
If translucent electrode is formed between gate insulating layers, then signal transmission characteristics are improved, but manufacturing complexity increases
Solution Approach 1:
The translucent electrode positioned between the gate insulating layers serves multiple functions: it acts as a signal transmission path, provides electrostatic capacitance for signal holding, and maintains structural integration with the gate electrode. This multi-functionality justifies the additional layer while improving reliability, as one structure accomplishes what would otherwise require multiple separate components
4Reliability
If capacitor upper electrode is formed from translucent metal layer, then electrostatic capacitance is maximized, but manufacturing precision requirements increase
Solution Approach 1:
The capacitor upper electrode is formed simultaneously with the gate electrode in the same mask process using the same conductive layer material. This merging eliminates the need for separate precision patterning of the capacitor electrode, as both structures are defined by the same photolithography step, thereby maintaining manufacturing precision while achieving maximized electrostatic capacitance through the translucent metal layer
Data Source
AI summary
A thin film transistor (TFT) array substrate includes a TFT including an active layer, a gate electrode, a source electrode, a drain electrode, a first gate insulating layer and a second gate insulating layer formed between the active layer and the gate electrode, and an interlayer insulating layer formed between the gate electrode and the source electrode and the drain electrode; a pixel electrode formed in an opening of the interlayer insulating layer, the pixel electrode including transparent conductive oxide; a translucent electrode formed in a region corresponding to the pixel electrode, between the first gate insulating layer and the second gate insulating layer; and a capacitor including a lower electrode formed from the same layer as the active layer, and an upper electrode formed from the same layer as the translucent electrode.