Thin-Film Transistor Size Reduction via Vertical Channel Length Control

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Solution Overview

Problem

Conventional thin-film transistor (TFT) fabrication methods struggle to reduce the size of TFTs due to limitations in the exposure process, making it difficult to achieve smaller sizes and higher aperture ratios for display devices with super narrow or bezel-less designs.

Innovation Solution

The TFT design includes an un-doped a-Si layer positioned between the source and drain electrodes, which allows for independent thickness control, enabling a reduction in the length of the TFT and overall size, as opposed to relying on the exposure process, with a step-like shape of the un-doped a-Si layer facilitating this configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the exposure process is used to define TFT dimensions, then the manufacturing process is conventional and reliable, but the TFT size cannot be further reduced

Engineering Contradiction:
Improvemanufacturing process reliabilityVSAvoidTFT size
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent changes the critical dimension control parameter from lateral exposure dimensions to vertical film thickness. By controlling the thickness of the un-doped a-Si layer (which becomes the effective channel length L), the TFT size can be reduced independently of exposure process limitations. This parameter transformation allows L to be controlled by deposition thickness rather than photolithography resolution.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention transitions from two-dimensional lateral dimension control (in the exposure plane) to one-dimensional vertical dimension control (film thickness). The un-doped a-Si layer is deposited with controlled thickness to define the channel length, utilizing the vertical dimension rather than relying solely on lateral patterning, thereby enabling smaller TFT dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the W/L ratio is increased to reduce TFT size, then the aperture ratio improves, but the length L cannot be reduced further due to exposure process limitations

Engineering Contradiction:
Improveaperture ratioVSAvoidTFT length
Core Design Contradiction:
Area of stationary objectVSLength of moving object

Solution Approach 1:

The patent transforms the control mechanism for length L from lateral exposure dimensions to vertical film thickness. By depositing the un-doped a-Si layer with a specific thickness, the channel length L can be precisely controlled at values smaller than what conventional exposure processes can achieve, enabling further reduction in TFT footprint while maintaining appropriate W/L ratios for high aperture ratios.

Inventive Principle:
Principle #35Parameter changes

3Length of moving object

If the thickness of the un-doped a-Si layer is reduced to decrease TFT length, then the TFT size is reduced, but the manufacturing precision requirements increase

Engineering Contradiction:
ImproveTFT lengthVSAvoidlayer thickness control
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The patent replaces the mechanical/optical measurement and control system (exposure and development processes) with a film deposition control system. The thickness of the un-doped a-Si layer, which defines the channel length L, is controlled during the deposition process rather than through post-deposition patterning, allowing for precise dimensional control through deposition parameters.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9923067B2Thin-film transistor and method for fabricating the same, array substrate and method for fabricating the same, and display device
Publication Date: 2018.03.20 BOE TECHNOLOGY GROUP CO LTD
  • US9923067B2 patent drawing
  • US9923067B2 patent drawing
  • US9923067B2 patent drawing

AI summary

A thin-film transistor (TFT) includes a gate electrode, a gate insulation layer, a source electrode, a drain electrode and an active layer arranged on a base substrate. The active layer includes an un-doped a-Si layer, a first doped a-Si layer and a second doped a-Si layer. One of the source electrode and the drain electrode is in contact with the first doped a-Si layer, and the other of the source electrode and the drain electrode is in contact with the second doped a-Si layer. The source electrode and the drain electrode are on different horizontal planes and spaced apart from each other, and the un-doped a-Si layer is positioned between the source electrode and the drain electrode.