Thin Film Transistor Wire Grid Channel for High Current
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Solution Overview
Problem
The industry faces challenges in increasing the resolution of display devices, requiring shorter charging times for pixels, which necessitates higher on-state current in thin film transistors, but current methods to achieve this, such as increasing the width of the channel region, result in increased space occupation and reduced aperture ratio.
Innovation Solution
A thin film transistor with a conductive wire grid disposed on its surface, where the length of the channel region is longer than the wire grid sections, allowing for increased on-state current without widening the active layer, thus reducing the transistor's space occupation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the width of the channel region is increased to increase the on-state current, then the on-state current is improved, but the space occupation is increased and the aperture ratio is reduced
Solution Approach 1:
The channel region is segmented into multiple sections by introducing a wire grid structure with spaced-apart wire grid sections. This segmentation allows the channel to be divided into multiple current paths, effectively increasing the total on-state current without increasing the overall width of the active layer, thus resolving the contradiction between current enhancement and space occupation.
Solution Approach 2:
The invention transitions from a two-dimensional current flow in a planar channel to a three-dimensional current distribution by stacking multiple wire grid sections vertically. This dimensional change enables current multiplication through vertical layering rather than horizontal expansion, maintaining a compact footprint while achieving higher on-state current.
2Manufacturing precision
If the resolution of display devices is increased, then the display quality is improved, but the charging time to pixels needs to be shortened which requires higher on-state current
Solution Approach 1:
The wire grid segments the channel into multiple parallel current pathways, collectively providing sufficient on-state current to charge pixels quickly even as pixel density increases. This segmentation strategy enables high-resolution displays to maintain fast charging times by distributing current across multiple channels.
Solution Approach 2:
The invention changes the electrical parameters of the channel by introducing conductive wire grid sections that modify the current distribution and resistance characteristics. This parameter change enables the channel to deliver higher current density required for fast charging in high-resolution displays without increasing physical dimensions.
3Power
If the wire grid sections are made longer to cover more channel region, then the on-state current is increased, but the channel region length is reduced
Solution Approach 1:
The invention resolves this contradiction by extending wire grid coverage in the vertical dimension rather than horizontally. Multiple wire grid sections are stacked vertically to cover more of the channel region's cross-section, increasing current capacity without consuming additional channel length and preserving the transistor's driving capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the on-state current of the thin film transistor while minimizing its space usage, thereby improving the aperture ratio and supporting higher resolution displays.
Implementation Method 1
a wire grid, disposed at least on a surface of the active region of the active layer, made of a conductive material and comprising a plurality of wire grid sections
Data Source
AI summary
A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display panel are provided. The thin film transistor includes an active layer and a wire grid which is disposed at least on a surface of an active region of the active layer and is made of a conductive material. The active layer includes a source region, a drain region, and the channel region between the source region and the drain region. The wire grid includes a plurality of wire grid sections which are spaced apart from each other, and in a direction from the source region to the drain region, a length of the channel region is longer than a length of the wire grid section.


