TFT-LCD Pixel Structure ESD Protection via Parallel Protective Capacitor
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Solution Overview
Problem
Conventional TFT-LCD pixel structures lack protection against electrostatic discharge (ESD) at the intersection points of gate and data lines, leading to gate line-data line short defects (DGS defects), which are difficult to repair and reduce production quality and yield.
Innovation Solution
A pixel structure with a protective capacitor is introduced, where a branch on the gate line forms a protective capacitor in parallel with the parasitic capacitor, having a smaller capacitance than the parasitic capacitor, to absorb electrostatic discharge and prevent damage to the parasitic capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protective capacitor is added to protect against ESD, then reliability is improved, but device complexity increases
Solution Approach 1:
The protective capacitor is merged with the existing parasitic capacitor structure by utilizing the same gate line and data line intersection. The protective capacitor shares the gate line as one electrode and uses a branch extending from the gate line as the other electrode, combining protection function with the existing circuit layout without adding separate complex structures.
Solution Approach 2:
The gate line is segmented by adding a branch that extends from the gate line to form one electrode of the protective capacitor. This segmentation allows the protective capacitor to be integrated into the existing gate line structure while providing ESD protection at the critical intersection point with the data line.
2Productivity
If a protective capacitor is added to reduce ESD defects, then yield is improved, but manufacturing complexity increases
Solution Approach 1:
The protective capacitor manufacturing is merged with the existing TFT-LCD manufacturing process by forming the protective capacitor electrodes using the same gate line and data line formation steps. The branch is formed as an extension of the gate line during the same photolithography and etching processes, eliminating the need for additional manufacturing steps.
3Reliability
If the capacitance of the protective capacitor is made smaller than the parasitic capacitor, then ESD protection effectiveness is improved, but the protective capacitor occupies more display region
Solution Approach 1:
The protective capacitor is designed with locally optimized characteristics where the capacitance value is specifically controlled to be smaller than the parasitic capacitor at the intersection point. This local quality adjustment ensures that the protective capacitor can effectively absorb ESD energy without significantly occupying display region, as the smaller capacitance requires less space while maintaining protection effectiveness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces ESD defect rates, improves yield, decreases manufacturing costs, especially for LCD TV products, while maintaining a simple protection mechanism and minimal display region occupation, and can be integrated into existing manufacturing processes without additional costs.
Implementation Method 1
a protective capacitor is formed between the branch and the data line and is connected in parallel to the parasitic capacitor, and the capacitance of the protective capacitor is less than that of the parasitic capacitor
Data Source
AI summary
One embodiment according to the present invention provides a pixel structure of a thin film transistor liquid crystal display (TFT-LCD) array substrate comprising a pixel electrode, a gate line and a data line, the gate line and the data line intersecting with each other to define a pixel unit and forms a parasitic capacitor at an intersection point between the gate line and the date line, wherein a branch is provided on the gate line and a protective capacitor is formed between the branch and the data line and is connected in parallel to the parasitic capacitor, and the capacitance of the protective capacitor is less than that of the parasitic capacitor.