THDi Reduction Circuit for PFC Controller Duty Cycle Control
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Solution Overview
Problem
Power factor correction (PFC) controllers often fail to maintain low total harmonic distortion (THDi) across varying line and load conditions due to component variations, leading to THDi specification failures, especially at high voltage AC input signals with light loads or low voltage AC input signals with heavy loads.
Innovation Solution
A THDi reduction circuit that determines whether the AC input signal is high or low voltage, limiting the duty cycle for high voltage signals to minimize voltage spikes and extending the duty cycle for low voltage signals while ensuring a predetermined off-time, using a maximum duty cycle extension element and rising edge blanking element to regulate the control signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the duty cycle is extended for low voltage input signals to improve power transfer, then the power delivery is improved, but the control signal may reach 100% duty cycle causing loss of control and increased THDi
Solution Approach 1:
The rising edge blanking element proactively prevents the control signal from reaching 100% duty cycle by blanking the rising edge of the PWM signal when the off-time expires. This preliminary anti-action ensures that the PFC controller maintains control authority even under extreme low voltage/high load conditions, preventing the harmful effect of complete duty cycle saturation.
2Object-affected harmful factors
If the duty cycle is limited for high voltage input signals to prevent voltage spikes, then voltage spike suppression is improved, but the power transfer efficiency decreases
Solution Approach 1:
The THDi reduction circuit dynamically adjusts the duty cycle behavior based on real-time detection of input voltage conditions. During zero-crossing detection in high voltage mode, the circuit temporarily limits the duty cycle to prevent voltage spikes, while allowing full duty cycle extension capability during normal operation. This dynamic adaptation resolves the contradiction by applying duty cycle limitation only when and where it is necessary to suppress voltage spikes.
3Adaptability or versatility
If component variations are accommodated to improve adaptability, then the circuit works across more conditions, but THDi specification failures occur due to controller limitations
Solution Approach 1:
The THDi reduction circuit implements feedback mechanisms by detecting the input voltage level and the state of the PFC controller. The circuit monitors whether the controller is approaching its duty cycle limitations and adjusts its behavior accordingly. This feedback loop ensures that even with component variations affecting the PFC controller's characteristics, the system maintains THDi compliance by adapting the duty cycle control strategy in real-time.
4Measurement precision
If the control signal duty cycle is extended to improve synchronization for low voltage signals, then the synchronization is improved, but the off-time may become insufficient causing control loss
Solution Approach 1:
The rising edge blanking element performs a preliminary action by expiring a predetermined off-time before allowing the duty cycle to reach 100%. This ensures that a minimum off-time is always maintained, preserving the PFC controller's ability to regulate the PFC stage even when extended duty cycle operation is required for synchronization improvement.
Data Source
AI summary
A total harmonic distortion (THDi) reduction circuit for a power factor correction (PFC) controller to control a PFC stage. The THDi reduction circuit determines whether an input signal, such as an alternating current (AC) line voltage is a high voltage or low voltage signal. For a high voltage input signal, the THDi reduction circuit may limit the duty cycle of a control signal to a PFC stage to minimize a voltage spike at the zero-crossing point of the input signal and thereby minimize THDi. For a low voltage input signal, the THDi reduction circuit may extend the duty cycle of the control signal to the PFC stage, while ensuring that the control signal has at least a predetermined off-time, i.e. the duty cycle is less than 100 percent. Extending the control signal duty cycle, especially for low voltage input signals under high load, may minimize THDi.