Thermal-Aware Throttling in 3D Processor Stacks
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Solution Overview
Problem
Conventional thermal management techniques for 2-D processor systems are ineffective in 3-D processor stacks due to high thermal coupling between layers, leading to thermal emergencies and performance overhead when dynamically migrating threads or throttling processor cores.
Innovation Solution
Implementing a system that selectively throttles processor cores in a 3-D processor stack based on thermal couplings and thread criticality, using a thermal sensitivity map to predict and mitigate thermal emergencies by adjusting power and voltage of non-critical threads and cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If threads are dynamically migrated from high temperature processor cores to low temperature processor cores, then thermal emergencies are avoided, but significant performance overhead is incurred
Solution Approach 1:
The system pre-computes and stores thermal coupling values between all processor core pairs in a thermal coupling matrix before runtime. This preliminary action enables fast thermal awareness during runtime without requiring dynamic thermal analysis, avoiding performance overhead while maintaining effective thermal management through informed thread migration decisions
Solution Approach 2:
The system continuously monitors processor core temperatures and uses the pre-computed thermal coupling matrix to predict temperature changes resulting from thread migrations. This feedback mechanism enables the system to make intelligent migration decisions that avoid thermal emergencies while minimizing performance impact by selecting migrations that cool hot cores without creating new thermal problems
2Temperature
If processor cores are throttled to reduce thermal impact, then thermal emergencies are avoided, but performance is lost
Solution Approach 1:
The system applies thermal management actions locally and selectively based on the thermal coupling matrix. Instead of uniform throttling or migration, the system identifies specific processor cores that have high thermal coupling to hot spots and selectively manages threads on those cores. This local quality approach ensures thermal emergencies are avoided while minimizing overall performance loss by leaving non-critical cores operating at full capacity
Solution Approach 2:
The system changes operational parameters (thread assignment, core frequency, voltage) based on real-time temperature readings and pre-computed thermal coupling values. By dynamically adjusting these parameters according to the thermal coupling matrix, the system achieves effective thermal management while optimizing performance by maintaining higher operating parameters on cores that have low thermal coupling to hot spots
3Device complexity
If conventional 2-D thermal management techniques are applied to 3-D processor stacks, then implementation is simple, but thermal emergencies occur due to high thermal coupling between layers
Solution Approach 1:
The system extends thermal management from 2-D plane-based approaches to 3-D stack-aware management by computing and utilizing thermal coupling values between processor cores on different stacked layers. The thermal coupling matrix captures vertical thermal interactions between layers, enabling the system to account for three-dimensional heat propagation and make informed decisions about thread placement and migration across layers, thereby preventing thermal emergencies in 3-D architectures
Solution Approach 2:
The system pre-computes the complete thermal coupling matrix between all processor cores in the 3-D stack before runtime, including cross-layer thermal couplings. This preliminary computation captures the complex 3-D thermal interactions without adding runtime complexity, enabling fast thermal-aware decisions during execution while maintaining manageable system complexity through offline preparation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively manages thermal emergencies in 3-D processor stacks by reducing thermal impact without significant performance loss, maintaining system performance by identifying and throttling non-critical threads and cores to alleviate heat distribution issues.
Implementation Method 1
The stacked silicon layers in the 3-D processor stack are separated by distances of tens to hundreds of microns and exhibit a high degree of thermal coupling. Thus, heat generated in one or more processor cores of one silicon layer can raise the temperature of the processor cores in the other silicon layers in the 3-D processor stack.
Data Source
AI summary
A three-dimensional (3-D) processor stack includes a plurality of processor cores implemented in a plurality of layers. A controller is to selectively throttle one or more of a plurality of processor cores in response to detecting a thermal event. The controller selectively throttles the one or more of the plurality of processor cores based on values of thermal couplings between the plurality of layers and based on measures of criticality of threads executing on the plurality of processor cores.