Thermal Feedback PUF Circuit for Stable Key Generation

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Solution Overview

Problem

Current Physically Unclonable Function (PUF) circuits in cryptographic systems suffer from high bit error rates due to temperature and supply voltage variations, making them susceptible to attacks and requiring additional error correction mechanisms.

Innovation Solution

The implementation of a multi-stage machine-learning resistant PUF circuit design with wide gate-source shorted transistor pairs and a thermal feedback system to maintain a stable temperature, reducing bit error rates and enhancing security through supply voltage and temperature insensitivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional PUF circuits are used, then unique cryptographic keys are generated, but high bit error rates occur due to temperature and supply voltage variations

Engineering Contradiction:
Improvebit error rateVSAvoidtemperature and supply voltage sensitivity
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements a thermal feedback system that continuously monitors the temperature of the PUF circuit and dynamically adjusts the bias current to compensate for temperature variations. This feedback mechanism maintains stable transistor matching conditions across different temperatures, significantly reducing bit error rates while preserving the unique cryptographic key generation capability

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the operating parameters of the PUF circuit by implementing dynamic biasing schemes that adjust supply voltage and current levels based on environmental conditions. By modifying these electrical parameters in response to temperature and supply variations, the circuit maintains consistent performance and low bit error rates across different operating conditions

Inventive Principle:
Principle #35Parameter changes

2Reliability

If error correction mechanisms are added to PUF circuits, then bit error rates are reduced, but device complexity and security vulnerability increase

Engineering Contradiction:
Improvebit error rateVSAvoiderror correction mechanisms
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent preemptively compensates for potential errors by implementing temperature compensation and stabilization mechanisms before bit errors can occur. The thermal feedback system and stabilized biasing circuits prevent mismatch conditions from developing, cushioning against the formation of bit errors rather than correcting them after occurrence, thereby eliminating the need for complex post-error correction mechanisms

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly reduces bit error rates, minimizing the need for error correction mechanisms and enhancing the security and reliability of cryptographic systems by maintaining consistent performance across varying conditions.

Implementation Method 1

a thermal feedback system to maintain a stable temperature

Methodology Applied
Scientific EffectThermal feedback: Feedback

Implementation Method 2

wide gate-source shorted transistor pairs

Methodology Applied
Scientific EffectGate-source shorting effect:

Data Source

PatentUS11290289B2Supply voltage and temperature insensitive physically unclonable function circuit
Publication Date: 2022.03.29 INTEL CORP
  • US11290289B2 patent drawing
  • US11290289B2 patent drawing
  • US11290289B2 patent drawing

AI summary

An apparatus is provided which comprises: a phase detector to receive a reference clock and a feedback clock; and one or more switchable heat elements controllable by an output of the phase detector, wherein the one or more switchable heat elements are coupled to a physically unclonable function circuit.