Multi-Chip Package Thermal Frame for Middle Layer Cooling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current Multi-Chip Packages face challenges in heat dissipation, particularly for middle layers, as traditional cooling methods are inadequate, leading to reduced efficiency and potential device failure due to heat accumulation.
Innovation Solution
A metallic thermal frame is introduced, where semiconductor dice are alternately stacked with thermally conductive layers and lateral portions, providing improved heat dissipation by conducting heat from the die stack to the substrate and external environment, while maintaining a compact and cost-effective manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a planar heat sink is provided in thermal contact with the top or bottom die, then heat dissipation from the surface is improved, but heat dissipation from middle layers remains insufficient
Solution Approach 1:
The patent transitions from a single planar heat sink (2D surface contact) to a three-dimensional thermal frame structure that surrounds the die stack on multiple sides. This dimensional expansion allows heat dissipation paths to extend laterally along the sides of the stack, effectively cooling middle layers that were previously inaccessible to top/bottom surface heat sinks alone.
Solution Approach 2:
The thermal frame is divided into multiple segments including top/bottom plates and lateral portions that can be separately positioned around different sections of the die stack. This segmentation allows each portion to independently manage heat from specific layers, with lateral portions providing dedicated cooling paths for middle layers without interfering with top/bottom die cooling.
2Ease of manufacture
If dice are laterally offset to expose bonding pads for single-step wire bonding, then manufacturing complexity is reduced, but thermal management capability is limited
Solution Approach 1:
The patent combines the lateral offset arrangement (which enables single-step wire bonding) with a thermal frame structure that adds thermal management capabilities. The frame merges cooling functionality with the existing compact die arrangement, allowing both manufacturing simplicity and effective heat dissipation to coexist without requiring dice to be returned to aligned positions.
3Temperature
If multiple thermally conductive layers are inserted between dice, then heat dissipation from middle layers is improved, but device complexity increases
Solution Approach 1:
The thermal frame acts as an intermediary structure that provides thermal management without requiring direct insertion of multiple thermally conductive layers between individual dice. The frame's lateral portions serve as intermediate heat transfer paths that connect middle layer dies to the cooling system, simplifying the overall assembly compared to layer-by-layer thermal interface approaches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively enhances heat dissipation across the entire die stack, reducing the risk of failure and maintaining a compact, cost-effective design, addressing the limitations of existing cooling methods.
Implementation Method 1
at least one layer of thermally conductive material disposed between two adjacent semiconductor dice... Each thermally conductive lateral portion is in thermal contact with the at least one layer of thermally conductive material
Implementation Method 2
providing improved heat dissipation by conducting heat from the die stack to the substrate and external environment
Data Source
AI summary
A semiconductor device includes a substrate having a plurality of substrate bonding pads disposed on a bonding surface thereof. A plurality of semiconductor dice are stacked on the bonding surface of the substrate to form a die stack. Each die has a plurality of die bonding pads arranged along at least one bonding edge thereof. The remaining edges of each die are non-bonding edges. A plurality of bonding wires each electrically connects one of the die bonding pads to one of the substrate bonding pads. At least one thermally conductive layer is disposed between two adjacent semiconductor dice. At least one thermally conductive lateral portion is in thermal contact with the at least one layer of thermally conductive material. Each thermally conductive lateral portion is arranged along a non-bonding edge of the die stack.


