Thermal Interface Layer for Low-Inductance Power Converter Cooling

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Solution Overview

Problem

Aerospace applications require improvements in the efficiency and power-to-weight ratio of power electronics converters, which are limited by high parasitic inductance in existing power module topologies, leading to heat generation and performance constraints.

Innovation Solution

The design incorporates a power electronics converter with a commutation cell featuring reduced parasitic inductance, achieved through a multi-layer planar carrier substrate and optimized electrical connections, allowing for higher operating voltages, frequencies, and heat removal efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If power module topology is used with conventional electrical connections, then device complexity is reduced and ease of manufacture is improved, but parasitic inductance increases leading to reduced efficiency and increased heat generation

Engineering Contradiction:

Improveconverter efficiencyVSAvoidelectrical connection structure

Core Design Contradiction:

Loss of energyVSDevice complexity

Solution Approach 1:

The patent transitions from conventional three-dimensional wire-based electrical connections to a two-dimensional planar configuration on a multi-layer carrier substrate. This dimensional change reduces the path length and parasitic inductance of electrical connections between power semiconductor devices, capacitors, and interconnections, thereby reducing energy losses while maintaining manufacturing feasibility through standardized PCB-like fabrication processes

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent integrates multiple electrical connection functions into a unified multi-layer carrier substrate structure. The substrate combines power interconnections, signal routing, and mechanical support into a single integrated platform, reducing the number of discrete connection components and their associated parasitic inductances, while simplifying the overall assembly process

Inventive Principle:

Principle #5Merging (Combining)

2Weight of moving object

If power module topology is used, then device availability is improved, but weight increases and power density is reduced

Engineering Contradiction:

Improveconverter weightVSAvoidconverter availability

Core Design Contradiction:

Weight of moving objectVSReliability

Solution Approach 1:

The patent divides the power converter into modular functional units (power semiconductor devices, capacitors, gate driver circuits) that are independently mounted on the multi-layer carrier substrate. This segmentation allows for optimized placement and reduced interconnection lengths, decreasing overall weight while maintaining the modularity and availability characteristics of power module topology through standardized interface designs

Inventive Principle:

Principle #1Segmentation

3Productivity

If conventional electrical connections are used, then manufacturing simplicity is maintained, but parasitic inductance increases causing voltage overshoot and limiting switching frequency

Engineering Contradiction:

Improveswitching frequencyVSAvoidelectrical connection fabrication

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent changes the geometric parameters of electrical connections by transitioning from wire-based three-dimensional paths to planar traces on a multi-layer substrate. This parameter change reduces connection length and loop area, thereby reducing parasitic inductance and enabling higher switching frequencies, while the planar fabrication process remains compatible with existing manufacturing capabilities

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances efficiency to over 99% and reduces weight, improving power density while effectively managing heat, thus addressing the limitations of existing converters.

Implementation Method 1

a thermal interface layer (TIL) between a heat removal side of the prepackage and the heat sink

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20230387762A1Thermal interface materials

Publication Date: 2023.11.30 ROLLS ROYCE DEUT LTD & CO KG

AI summary

A power electronics converter includes a multi-layer planar carrier substrate, and a converter commutation cell including a power circuit. The power circuit includes at least one power semiconductor switching element, each of which is comprised in a power semiconductor prepackage. Each power semiconductor prepackage includes one or more power semiconductor switching elements embedded in a solid insulating material. A heat sink is arranged to remove heat from the respective power semiconductor prepackage. A thermal interface layer is arranged between a heat removal side of the respective power semiconductor prepackage and the heat sink. The thermal interface layer has a thermal conductivity and a mechanical compressibility. A converter parameter, which is defined as the mechanical compressibility of the thermal interface layer divided by the thermal conductivity of the thermal interface layer, satisfies 0.1 MNK/Wm<Ω<1 GNK/Wm.