Thermal Oxidation Trench Isolation for Semiconductor Reliability
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Solution Overview
Problem
Existing semiconductor trench manufacturing methods using chemical vapor deposition (CVD) for silicon oxide layers result in lower dielectric strength and higher impurity levels, which can lead to insulation flaws and increased costs, particularly when attempting to isolate transistors and create reliable electrical contacts.
Innovation Solution
The method involves etching a trench in a semiconductor body, forming a high-quality thermally oxidized silicon oxide layer on the side walls and bottom, and filling it with polysilicon to create a conductive polysilicon body, using standard semiconductor processing steps and additional etching masks to ensure precise insulation and electrical contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon oxide layer is deposited by chemical vapor deposition (CVD), then the manufacturing process is simple and fast, but the dielectric strength is lower and impurity levels are higher
Solution Approach 1:
The patent changes the deposition method from CVD to thermal oxidation, fundamentally altering the process parameters to achieve superior dielectric strength and lower impurity levels in the silicon oxide layer, resolving the contradiction between reliability and ease of manufacture
Solution Approach 2:
The patent replaces the chemical vapor deposition process with a thermal oxidation process, substituting a chemical deposition mechanism with a thermal diffusion mechanism that naturally produces higher quality silicon oxide layers with fewer impurities and higher dielectric strength
2Reliability
If a trench is etched deeper than 5 μm to improve transistor isolation, then isolation effectiveness increases, but the risk of flaws in the silicon oxide layer increases
Solution Approach 1:
The patent changes the silicon oxide layer formation method to thermal oxidation, which produces a denser, more uniform layer that is less prone to flaws even at greater trench depths, enabling reliable isolation without increasing defect risk
Solution Approach 2:
The patent applies thermal oxidation to create a high-quality silicon oxide layer before filling the trench, providing a robust foundation that prevents flaws from developing during subsequent processing steps, especially important for deep trenches
3Reliability
If an insulating layer with high dielectric strength is required, then thermal oxidation must be used, but the process time and temperature requirements increase
Solution Approach 1:
The patent utilizes the inherent properties of thermal oxidation to achieve high dielectric strength, accepting the trade-off in process time and temperature while benefiting from the superior quality of the resulting silicon oxide layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances dielectric strength, reduces impurity levels, and allows for reliable electrical contacting at lower costs, effectively isolating transistors and preventing unintended interactions, such as latching up, while maintaining high insulation quality on the trench side walls.
Implementation Method 1
The silicon oxide layer is realized by means of thermal oxidation
Implementation Method 2
An electric contact with the semiconductor body can be advantageously produced underneath the bottom of the trench by means of the polysilicon body since doped polysilicon is a conductive material
Data Source
AI summary
A method for manufacturing a semiconductor body with a trench comprises the steps of etching the trench (11) in the semiconductor body (10) and forming a silicon oxide layer (12) on at least one side wall (14) of the trench (11) and on the bottom (15) of the trench (11) by means of thermal oxidation. Furthermore, the silicon oxide layer (12) on the bottom (15) of the trench (11) is removed and the trench (11) is filled with polysilicon that forms a polysilicon body (13).