Thermal Pathways for Embedded Inductors in Package Substrates
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Solution Overview
Problem
The high thermal resistance of organic materials in package substrates limits the heat transfer from embedded inductors, restricting the current-carrying capacity and performance of integrated voltage regulators due to excessive substrate temperatures.
Innovation Solution
The introduction of thermally conductive structures, such as grouped power bumps and vias, and a magnetic block below the inductors, creates a lower thermal resistance pathway directly from the inductors to the board, bypassing the die and reducing thermal load on the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If heat transfer through organic package substrate material is used, then the structure is simple and integrates well, but thermal resistance is high and heat dissipation is insufficient
Solution Approach 1:
The patent introduces a composite thermal management structure combining organic substrate material with high-thermal-conductivity materials (metal layers, thermal vias, heat spreaders). This composite approach creates dedicated thermal pathways that bypass the high-resistance organic material, allowing simultaneous use of simple organic substrate and effective heat transfer.
Solution Approach 2:
The patent introduces intermediary thermal conduction structures (metal trace layers, thermal vias filled with conductive material, heat spreaders) that act as mediators between the inductor heat source and the substrate. These intermediaries provide low-resistance thermal pathways, decoupling the heat transfer function from the high-resistance organic substrate material.
2Productivity
If inductor current capacity is increased, then system performance improves, but substrate temperature exceeds reliability limits
Solution Approach 1:
The patent segments the thermal management function from the electrical function by creating separate dedicated thermal pathways (thermal vias, heat spreaders, ground planes) distinct from the power delivery traces. This segmentation allows independent optimization of current carrying capacity and heat dissipation, enabling higher currents without proportional temperature increases.
Solution Approach 2:
The patent extends thermal management into the vertical dimension by implementing multi-layer thermal vias, stacked heat spreaders, and through-substrate thermal pathways. This three-dimensional thermal architecture provides additional thermal conduction routes that scale with package complexity, allowing increased current capacity while maintaining temperature control through volumetric heat sinking.
3Reliability
If thermal pathways through die and bumps are used, then heat can reach thermal solution, but thermal resistance is high due to organic material
Solution Approach 1:
The patent implements multi-functional structures that simultaneously provide electrical and thermal functions. For example, ground planes serve both as electrical reference planes and thermal conduction pathways; power delivery traces double as heat sinks; vias are designed to provide both electrical connectivity and thermal conduction. This universality reduces the need for separate dedicated thermal structures, lowering overall complexity.
Solution Approach 2:
The patent merges thermal management functions with existing electrical structures. Heat spreaders are integrated with signal layers, thermal vias are combined with electrical vias, and ground planes are used as thermal sinks. This merging eliminates the need for separate thermal management layers, reducing device complexity while improving heat dissipation efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances heat dissipation, increases the current-carrying capacity of inductors, and improves thermal and electrical performance by reducing substrate temperatures and DC resistance.
Implementation Method 1
The introduction of thermally conductive structures, such as grouped power bumps and vias, and a magnetic block below the inductors, creates a lower thermal resistance pathway directly from the inductors to the board
Implementation Method 2
a magnetic block below the inductors, creates a lower thermal resistance pathway directly from the inductors to the board, bypassing the die
Data Source
AI summary
Embodiments disclosed herein include electronics packages with improved thermal pathways. In an embodiment, an electronics package includes a package substrate. In an embodiment, the package substrate comprises a plurality of backside layers, a plurality of front-side layers, and a core layer between the plurality of backside layers and the plurality of front-side layers. In an embodiment, an inductor is embedded in the plurality of backside layers. In an embodiment, a plurality of bumps are formed over the front-side layers and thermally coupled to the inductor. In an embodiment, the plurality of bumps are thermally coupled to the core layer by a plurality of vias.