Suspended Thermal Sensor Membrane Layout for Low 1/f Noise
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Solution Overview
Problem
Existing thermal detectors face challenges in optimizing the electrical resistance and 1/f noise of the thermistor layer, which affects performance metrics such as NETD and NEP, due to limitations in the dimensions and configuration of the electrodes and thermistor layer.
Innovation Solution
A thermal detector design featuring a looped first electrode extending along the periphery of the absorbing membrane, with a central portion and a radial track for the second electrode, and a thermistor layer with specific contact zones, optimizing the electrical resistance while maintaining a sufficient polarized volume to minimize 1/f noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thermistor layer is made with a small width to fit within pixel dimensions, then the electrical resistance is reduced, but the polarized volume is reduced leading to higher 1/f noise
Solution Approach 1:
The patent transitions from a linear electrode arrangement to a loop configuration, effectively moving from one-dimensional to two-dimensional spatial utilization. This allows the electrode to occupy more area within the same pixel footprint, increasing the polarized volume of the thermistor layer without increasing the linear dimensions beyond pixel boundaries, thus reducing 1/f noise while maintaining low electrical resistance.
Solution Approach 2:
The patent employs a loop-shaped electrode configuration instead of straight or interdigitated linear electrodes. This curved/loop geometry maximizes the contact area with the thermistor layer within the constrained pixel area, effectively increasing the polarized volume and reducing 1/f noise while keeping the electrical resistance low through the continuous loop path.
2Object-generated harmful factors
If the dimension L between electrode contacts is increased to avoid excessive 1/f noise, then the polarized volume is increased, but the electrical resistance increases
Solution Approach 1:
By configuring the electrode as a loop rather than a linear arrangement, the patent utilizes two-dimensional space to create multiple current paths through the thermistor layer. This increases the effective polarized volume without requiring a large linear dimension L, thereby reducing 1/f noise while maintaining low electrical resistance through the distributed loop geometry.
3Ease of manufacture
If the thermistor layer thickness is reduced to lower production costs, then the manufacturing cost is reduced, but the electrical resistance and noise performance may be affected
Solution Approach 1:
The loop-shaped electrode configuration compensates for reduced thermistor layer thickness by maximizing the surface area and polarized volume within the available pixel area. This two-dimensional optimization ensures sufficient signal strength and low noise performance even with thinner, more cost-effective thermistor layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances performance by optimizing electrical resistance and reducing 1/f noise, leading to improved NETD and NEP, and potentially reducing production costs through thinner thermistor layer deposition.
Implementation Method 1
an absorber 54 adapted to absorb the electromagnetic radiation to be detected
Implementation Method 2
The thermistor layer 53 is made of a material whose electrical resistance varies with its temperature
Implementation Method 3
The absorbing membrane 50 is vertically separated from a reflector 12 by a predetermined distance so as to form a quarter-wave interference cavity that optimizes the absorption of the electromagnetic radiation to be detected by the absorber 54
Data Source
Figure 1A~2
Figure 3A~3B
Figure 4A~4B
AI summary
The invention relates to a thermal detector comprising an absorbing membrane (50) suspended above a reading substrate (10), which includes a thermistor layer (53) resting on two electrodes (51, 52). The first electrode (51) is a loop track, and the second electrode (52) has a central portion (52.1) and a radial track (52.2). Furthermore, the thermistor layer (53) has a peripheral contact area (53p) in contact with the first electrode (51) and a central contact area (53c) in contact with the central portion (52.1); the thermistor layer (53) being electrically isolated from the radial track (52.2).