Thermal Sensor Vptat Multiplier Using Time-Domain Sigma-Delta Scaling
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Solution Overview
Problem
Existing temperature sensing circuits in systems on a chip (SOCs) face challenges in achieving high accuracy due to mismatch errors in sampling capacitors, which affect the ratio of input voltage to reference voltage, leading to errors in detected temperature.
Innovation Solution
The proposed temperature sensor circuit employs a switched capacitor sigma-delta modulated (SDM) analog to digital converter (ADC) that samples and integrates the voltage proportional to absolute temperature (Vptat) and a temperature-independent reference voltage (Vref) in the time domain, eliminating the need for digital element matching and reducing mismatch errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If sampling capacitors are used to scale Vptat and Vref, then the temperature detection function is enabled, but mismatch errors in the capacitors cause measurement precision degradation
Solution Approach 1:
The patent replaces the traditional capacitor-based scaling mechanism with a time-domain scaling approach using a sigma-delta modulator. Instead of using sampling capacitors to scale Vptat and Vref, the system uses a single sampling capacitor and scales the input signal through multiple sampling cycles and digital filtering. This substitution eliminates capacitor mismatch errors while maintaining the temperature detection function.
Solution Approach 2:
The patent changes the scaling parameter from capacitor value ratios to time-domain integration factors. By accumulating the sampled signal over multiple cycles and using digital decimation filtering, the system achieves scaling without relying on precise capacitor ratios. This parameter change from spatial (capacitor value) to temporal (sampling duration) domain resolves the mismatch error problem.
2Measurement precision
If digital element matching is used to correct capacitor mismatch errors, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent eliminates the need for digital element matching circuits by substituting the capacitor-based scaling mechanism with time-domain scaling. The system uses a single sampling capacitor and achieves precise scaling through multiple sampling cycles and digital decimation filtering, thereby removing the complexity of element matching hardware while maintaining or improving measurement precision.
Solution Approach 2:
The patent extracts and removes the problematic sampling capacitors from the signal path. By using a single sampling capacitor for both Vptat and Vref and performing scaling in the time domain through multiple sampling cycles, the system eliminates the need for multiple matched capacitors and the associated digital element matching correction circuits.
3Ease of operation
If multiple sampling capacitors are used to scale Vptat and Vref separately, then the temperature detection function is enabled, but manufacturing precision requirements increase due to mismatch sensitivity
Solution Approach 1:
The patent replaces the multi-capacitor scaling architecture with a time-domain scaling approach using a single sampling capacitor. The system samples the input signal multiple times and accumulates the results digitally, achieving scaling without requiring multiple precisely-matched capacitors. This substitution dramatically reduces manufacturing precision requirements.
Solution Approach 2:
The patent merges the scaling function into the time domain by using a single sampling capacitor for both Vptat and Vref. Instead of having separate capacitors for each signal that must be precisely matched, the system uses one capacitor and achieves different scaling factors through different numbers of sampling cycles and digital filtering operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for accurate scaling of Vptat in the time domain, reducing mismatch errors and improving the accuracy of temperature detection, while also simplifying the hardware and reducing power consumption.
Implementation Method 1
A voltage proportional to absolute temperature Vptat can be produced as the difference between the base-emitter junction voltages of two bipolar junction transistors biased at different current densities. Mathematically, this can be represented as: Vptat=ΔVbe=Vbe1−Vbe2.
Implementation Method 2
The proposed temperature sensor circuit employs a switched capacitor sigma-delta modulated (SDM) analog to digital converter (ADC) that samples and integrates the voltage proportional to absolute temperature (Vptat) and a temperature-independent reference voltage (Vref) in the time domain, eliminating the need for digital element matching and reducing mismatch errors.
Data Source
AI summary
A method for determining temperature of a chip, includes generating a first voltage and a second voltage using a pair of bipolar-junction transistors, and generating a third voltage using another bipolar-junction transistor. When a most recent bit of a bitstream is a logic-zero, the difference between the first and second voltages is sampled using a switched-capacitor input-sampling circuit, and a difference between the first and second voltages is integrated, to produce a proportional-to-absolute-temperature voltage. The proportional-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream. When the most recent bit of the bitstream is a logic-one, the third voltage is sampled using the switched-capacitor input-sampling circuit, and the third voltage is integrated, to produce a complementary-to-absolute-temperature voltage. The complementary-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream. The bitstream is filtered and decimated to produce an output code representative of the temperature of the chip.