Thermal Shield Stack for Monolithic 3D IC Heat Management
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Solution Overview
Problem
Monolithic three-dimensional integrated circuits face challenges in thermal management during high-temperature annealing processes, where existing thermal shield stacks are difficult to etch due to copper's lack of volatile compounds and are not electrically insulating, and materials like diamond and hexagonal boron nitride are hard to manufacture in thin, uniform layers with desired anisotropic thermal conductivity.
Innovation Solution
A thermal shield stack comprising dielectric materials with a thermal spreader portion (e.g., BeO, SiC, hBN) for lateral heat dissipation and a thermal retarder portion (e.g., CDO, out-of-plane hBN, Aerogel) to prevent heat from dissipating downward, along with a method of epitaxially growing hexagonal boron nitride using electron-enhanced atomic layer deposition on a bare silicon wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If copper shield layers are used in the thermal shield stack, then thermal conductivity is improved for heat spreading, but etching difficulty increases due to copper's lack of volatile compounds
Solution Approach 1:
The patent changes the material parameter from copper to tungsten, which has different thermal and etching properties. Tungsten provides sufficient thermal conductivity for heat spreading while being etchable using standard semiconductor manufacturing processes, thus resolving the contradiction between thermal performance and manufacturability
Solution Approach 2:
The patent uses a sacrificial oxide layer that can be easily removed to expose the tungsten shield layer. This sacrificial layer approach simplifies the manufacturing process by enabling sequential access to different layers without requiring complex etching of the shield material itself
2Temperature
If copper shield layers are used in the thermal shield stack, then thermal conductivity is improved, but electrical insulation is lost
Solution Approach 1:
The patent changes the material from electrically conductive copper to electrically insulating tungsten, thereby maintaining electrical insulation requirements while still providing sufficient thermal conductivity for heat spreading across the shield layer
Solution Approach 2:
The patent creates a composite structure with multiple layers including dielectric materials and tungsten shield layers. This composite approach allows each layer to perform its specific function: dielectric layers provide electrical insulation while the tungsten layers provide thermal management, achieving both requirements simultaneously
3Temperature
If diamond or hexagonal boron nitride is used for thermal shielding, then thermal conductivity is improved with anisotropic properties, but manufacturing difficulty increases for thin uniform layers
Solution Approach 1:
The patent uses a sacrificial oxide layer that is easily manufactured and removed to enable formation of the tungsten shield structure. This sacrificial approach simplifies the overall manufacturing process compared to directly depositing difficult-to-form materials like diamond or hBN in thin uniform layers
Solution Approach 2:
The patent changes from using materials requiring complex deposition processes (diamond, hBN) to using tungsten which can be deposited using standard semiconductor manufacturing techniques, thereby maintaining thermal performance while dramatically improving manufacturability
4Reliability
If high-temperature anneal is performed for Tier2 device, then dopant activation efficiency is improved, but Tier1 device suffers from excessive dopant diffusion and damage
Solution Approach 1:
The patent introduces a tungsten thermal shield layer as an intermediary between Tier1 and Tier2 devices. This shield layer acts as a thermal barrier that selectively blocks heat flow to protect Tier1 devices during high-temperature annealing of Tier2 devices, while still allowing the annealing process to proceed effectively for Tier2
Solution Approach 2:
The patent segments the thermal management function by placing a dedicated shield layer between the two device tiers. This segmentation allows independent thermal control, enabling high-temperature processing of Tier2 without adversely affecting Tier1, thus resolving the contradiction between dopant activation efficiency and protection from thermal damage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively protects the lower device from excessive heat during high-temperature annealing, maintaining it at a safe temperature and improving the manufacturability of vias with high density and low aspect ratio, while promoting upward heat dissipation for better device performance.
Implementation Method 1
a thermal spreader portion (e.g., BeO, SiC, hBN) for lateral heat dissipation
Implementation Method 2
a thermal retarder portion (e.g., CDO, out-of-plane hBN, Aerogel) to prevent heat from dissipating downward
Implementation Method 3
a method of epitaxially growing hexagonal boron nitride using electron-enhanced atomic layer deposition on a bare silicon wafer
Implementation Method 4
electron-enhanced atomic layer deposition
Data Source
AI summary
A monolithic three-dimensional integrated circuit including a first device, a second device on the first device, and a thermal shield stack between the first device and the second device. The thermal shield stack includes a thermal retarder portion having a low thermal conductivity in a vertical direction, and a thermal spreader portion having a high thermal conductivity in a horizontal direction. The thermal shield stack of the monolithic three-dimensional integrated circuit includes only dielectric materials.