Thermal Simulation Device for Transaction-Level Chip Power Modeling

The patent creates a simplified thermal simulation model that copies the essential thermal behavior of complex circuits at the transaction level, rather than using full-scale detailed thermal software. This allows thermal simulation to be performed early in the design process with much lower computational requirements while maintaining sufficient accuracy for design decisions.

The patent employs lightweight thermal simulation models that can be rapidly created and discarded for different design scenarios, replacing expensive, time-consuming full-scale thermal software runs. These simplified models enable multiple simulation iterations without prohibitive computational costs.

The patent divides the chip into multiple thermal zones or regions, each with its own simplified thermal model. This segmentation allows accurate local thermal analysis without requiring a fully detailed global thermal simulation, reducing overall system complexity while maintaining measurement precision where needed.

The patent changes the parameters and level of detail in thermal models based on the specific design stage and requirements. Early-stage designs use coarse-grained models with fewer parameters, while later stages can incorporate more detailed parameters, allowing precision to be improved without permanently increasing device complexity.