Thermal Spreader Profile for CTE-Stable Semiconductor Packaging
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Solution Overview
Problem
The coefficient of thermal expansion (CTE) mismatch between materials in semiconductor packages, such as metal, silicon, and substrates, leads to thermal stress and potential delamination or cracking, especially when using high thermal conductivity materials like metal thermal interface materials (TIM) for high-power applications.
Innovation Solution
A thermal spreader layer with a discontinuous thickness profile is applied, where the thickness is substantially thinner over the gaps between device dies, reducing thermal stress and preventing delamination by enhancing elasticity and resiliency, and is separated from the filling material to further mitigate stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If metal thermal interface material is used for high thermal conductivity, then heat dissipation performance is improved, but thermal stress and delamination risk increase due to CTE mismatch
Solution Approach 1:
The thermal spreader layer has a non-uniform thickness profile with different thicknesses in different regions. The first thickness is applied in a first region and a second thickness is applied in a second region, allowing local adaptation to different thermal and mechanical requirements. This local variation in thickness enables the structure to accommodate CTE mismatches in different areas while maintaining effective heat dissipation.
Solution Approach 2:
The patent changes the physical parameter of the thermal spreader layer thickness to optimize both thermal performance and mechanical reliability. By varying the thickness parameter across different regions, the design balances heat dissipation requirements with stress reduction needs, preventing delamination while maintaining effective thermal management.
2Ease of manufacture
If uniform thickness thermal spreader layer is used, then manufacturing simplicity is maintained, but thermal stress cannot be effectively reduced in gap regions
Solution Approach 1:
The thermal spreader layer implements local quality by having different thicknesses in different regions. The first thickness in the first region and the second thickness in the second region allow the structure to address thermal stress concentrations in specific areas (such as gap regions) while maintaining manufacturability through a systematic deposition process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces thermal stress between device dies, prevents delamination, and enhances the structural integrity and heat dissipation of semiconductor packages by using a thermal spreader layer with a profiled thickness that accommodates CTE mismatches and void formation.
Implementation Method 1
thermal spreader layer disposed between the lid structure and the plurality of device dies
Implementation Method 2
The coefficient of thermal expansion (CTE) mismatch between materials in semiconductor packages, such as metal, silicon, and substrates, leads to thermal stress
Implementation Method 3
reducing thermal stress and preventing delamination by enhancing elasticity and resiliency
Data Source
AI summary
A manufacturing method of a semiconductor package includes the following steps. A package structure is provided over a substrate, wherein the package structure includes a plurality of device dies and a filling material filling a gap between adjacent two of the plurality of device dies. A thermal spreader layer is provided over the package structure, wherein the thermal spreader layer has a profile that is discontinuous in thickness at a gap region aligned with the gap. A lid structure is provided over the substrate and in contact with the thermal spreader layer.