Thick Bond Pad for Cavity Image Sensor

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Chips with cavity packages face a conflict between thin top wiring layers for high light sensitivity and thick bond pads for low resistance connections, as thin top wiring layers result in high resistance connections due to small cross-sectional areas.

Innovation Solution

A method involving a substrate with vias through inter layer dielectric, multiple conductive layers with varying thicknesses, a polymer layer with a cavity, and an optically transparent layer to form a thick bond pad while maintaining sensitivity, including depositing a silicon nitride layer, etching, and forming a second conductive layer with a thinner thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If thin top wiring layers are used to maximize light sensitivity, then light sensitivity is improved, but connection resistance increases due to small cross-sectional area

Engineering Contradiction:
Improvelight sensitivityVSAvoidconnection resistance
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

The top wiring layer is segmented into two distinct layers: a thin upper layer (less than 1 micron) for light sensitivity and a thick lower layer (1 micron or more) for low resistance connections. This segmentation allows each layer to optimize its function independently, resolving the contradiction between sensitivity and connection quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The wiring structure transitions from a single-layer two-dimensional configuration to a multi-layer three-dimensional configuration. By stacking conductive layers at different heights (z-dimension), the invention achieves both thin profile for sensitivity and sufficient cross-sectional area for low resistance through vertical stacking.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If thick bond pads are used to reduce connection resistance, then connection resistance is improved, but light sensitivity decreases due to larger cross-sectional area blocking light

Engineering Contradiction:
Improveconnection resistanceVSAvoidlight sensitivity
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

The bond pad structure is segmented vertically into a thin upper portion and a thick lower portion. The thin upper portion minimizes light blocking while the thick lower portion provides low resistance electrical connection, allowing both requirements to be satisfied simultaneously in different spatial zones.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the conductive structure have different thicknesses optimized for their specific functions: the upper regions near the light path are kept thin for sensitivity, while lower regions for electrical connection are made thick for low resistance. This local quality variation resolves the global contradiction.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for improved connectivity with lower resistance while maintaining the thin top wiring layers' sensitivity, enabling finely spaced and narrow wires, and protecting cavity components.

Implementation Method 1

depositing a silicon nitride layer over an inter layer dielectric (ILD)

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

etching the silicon nitride layer with a fluorine-based etch

Methodology Applied
Scientific EffectChemical Etching:

Data Source

PatentUS9059180B2Thick bond pad for chip with cavity package
Publication Date: 2015.06.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9059180B2 patent drawing
  • US9059180B2 patent drawing
  • US9059180B2 patent drawing

AI summary

Disclosed herein an image sensor chip, including a substrate having at least one via extending through at least one inter layer dielectric (ILD); a first conductive layer over the ILD, wherein the first conductive layer has a first thickness; a second conductive layer over the first conductive layer, wherein the second conductive layer has a second thickness of less than the first thickness; a polymer layer over the second conductive layer, the polymer layer including a cavity; a plurality of cavity components in the cavity; and protective layer contacting the polymer layer and covering the cavity.