Thick Electrode Passivation Structure for Thermal Crack Prevention
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Solution Overview
Problem
In semiconductor devices with thick electrodes for power control, the passivation film is prone to cracking due to thermal expansion coefficient differences with metallic layers, leading to potential failure.
Innovation Solution
The semiconductor device incorporates a passivation film with a curved surface and a barrier metal layer having a trapezoidal shape to relax thermal stresses, preventing crack formation by integrating a metallic layer with a curved surface and a barrier metal layer with an inclined end face.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a passivation film is formed on thick metallic layers for power control, then the device can handle large current, but cracks are likely to be generated on the passivation film due to thermal expansion coefficient difference
Solution Approach 1:
The metallic layer is configured with a curved surface instead of a flat surface. This curvature design allows the passivation film to conform to the underlying metallic layer, reducing stress concentration and preventing crack formation during thermal cycling while maintaining the thick electrode structure needed for high current handling
Solution Approach 2:
The passivation film is formed with different thickness or material properties at different locations. Specifically, the passivation film is made thicker or has different compositional characteristics at the edges of the metallic layer where stress concentration occurs, compared to the center region, providing localized stress relief and crack prevention
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces stress concentrations, preventing crack formation in the passivation film, enhancing the device's reliability and longevity.
Implementation Method 1
a crack is likely to be generated on the passivation film due to a difference in the thermal expansion coefficient from the metallic layers
Data Source
AI summary
A semiconductor device according to the present embodiment includes a semiconductor member, an interlayer film, a metallic layer, and a passivation film. The interlayer film is located on a side of an upper surface of the semiconductor member. The metallic layer is located to cover at least a part of a region on a side of an upper surface of the interlayer film. The passivation film is formed on the upper surface of the interlayer film where the metallic film is not located, and on side surfaces and upper surfaces at end portions of the metallic layer. An upper part of the end portions of the metallic layer has a curved surface.