Thick RDL Semiconductor Packaging with Laser-Exposed Traces
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Solution Overview
Problem
Current semiconductor packaging methods face challenges in achieving smaller footprint and efficient electrical interconnection, particularly in forming thick redistribution layers (RDLs) for panelized packaging, which affects the miniaturization and performance of semiconductor devices.
Innovation Solution
A method involving the formation of RDL traces with a thickness greater than 8 micrometers over semiconductor die, encapsulating them with a non-photoimagable material, and using laser ablation to expose these traces, allowing for the creation of conductive bumps and BGA pads, while maintaining a controlled encapsulant thickness to ensure structural integrity and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional thin RDL traces are used, then manufacturing precision is easier to achieve, but electrical interconnectivity and current carrying capacity are insufficient
Solution Approach 1:
The patent applies parameter changes by transitioning from thin RDL traces to thick RDL traces (greater than 8 micrometers thickness). This parameter change in trace thickness improves electrical interconnectivity and current carrying capacity while resolving the limitations of conventional thin traces. The thick RDLs are formed through controlled deposition processes that maintain manufacturing precision despite the increased thickness parameter.
2Reliability
If thick RDL traces greater than 8 micrometers are formed, then electrical interconnectivity is improved, but package footprint increases
Solution Approach 1:
The patent resolves the footprint issue by transitioning from planar two-dimensional trace routing to three-dimensional vertical interconnection structures. Thick RDL traces are formed with controlled depth, and vias are created to connect different vertical levels. This dimensional change allows thick traces to provide enhanced electrical connectivity without proportionally increasing the horizontal package footprint, as the interconnection volume is utilized in the vertical dimension rather than spreading laterally.
3Strength
If encapsulant material is applied to cover thick RDL traces, then structural integrity is improved, but access to traces for electrical connection becomes difficult
Solution Approach 1:
The patent applies segmentation by dividing the encapsulant structure into distinct regions. Encapsulant material is selectively applied to cover portions of the thick RDL traces that require structural protection, while leaving other portions exposed or accessible. This segmented encapsulation approach maintains structural integrity in critical areas while preserving ease of operation and electrical access in other areas through strategically positioned access points or openings in the encapsulant layer.
4Manufacturing precision
If laser ablation is used to expose RDL traces, then manufacturing precision is improved, but production time increases
Solution Approach 1:
The patent replaces mechanical or chemical etching methods with laser ablation technology. The laser ablation process uses focused light energy to precisely remove encapsulant material and expose RDL traces with high manufacturing precision. Although laser processing can be time-consuming, the patent optimizes the process parameters and likely uses automated scanning systems to improve production throughput. The precision benefits of laser ablation in creating clean, accurate trace exposures outweigh the time cost, especially for complex interconnection patterns where precision is critical.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of semiconductor packages with enhanced electrical interconnectivity and reduced package size, improving the miniaturization and performance of semiconductor devices by allowing for thicker RDLs and efficient encapsulation, thus addressing the limitations of existing methods.
Implementation Method 1
using laser ablation to expose these traces
Data Source
AI summary
A method of making a semiconductor package can include forming a plurality of redistribution layer (RDL) traces disposed over active surfaces of a plurality of semiconductor die and electrically connected to contact pads on the plurality of semiconductor die. The method can include disposing an encapsulant material over the active surfaces, contacting at least four side surfaces of each of the plurality of semiconductor die, and disposed over the plurality of RDL traces. The method can also include forming a via through the encapsulant material to expose at least one of the plurality of RDL traces, forming an electrical interconnect disposed within the via and coupled to the at least one RDL trace, and singulating the plurality of semiconductor packages through the encapsulant material to leave an offset of 30-140 μm of the encapsulant material disposed around a periphery of each of the plurality of semiconductor die.