Thin-Substrate CSP Structure for Low Warpage and Strength

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Solution Overview

Problem

Existing CSP semiconductor devices with thin semiconductor substrates face challenges in maintaining mechanical strength and preventing excessive warpage, which leads to reliability issues and low yield in device fabrication.

Innovation Solution

A CSP semiconductor device is developed with a semiconductor substrate thickness ranging from 15 μm to 35 μm, accompanied by a metal layer stack and a compound layer with specific thermal expansion and glass transition temperature properties, to enhance mechanical strength and reduce warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of the semiconductor substrate is reduced to less than 35 μm, then the DC resistance is reduced and electrical performance is improved, but the mechanical strength decreases and excessive warpage occurs

Engineering Contradiction:
Improveelectrical performanceVSAvoidmechanical strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies composite materials by depositing multiple metal layers (titanium, nickel, copper, gold) with different properties onto the substrate back surface. This composite structure provides both mechanical reinforcement to prevent warpage and electrical conductivity to reduce resistance, resolving the contradiction between thin substrate requirements for electrical performance and structural integrity.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes physical parameters by controlling the thickness, material composition, and thermal mechanical properties of the deposited metal layers. By optimizing these parameters, the system achieves sufficient mechanical strength and warpage control while maintaining the thin substrate thickness needed for low DC resistance and high electrical performance.

Inventive Principle:
Principle #35Parameter changes

2Strength

If additional stiffness layers are attached onto the wafer back surface, then the mechanical strength is improved and DC resistance is reduced, but excessive warpage occurs due to thermal mechanical property mismatches

Engineering Contradiction:
Improvemechanical strengthVSAvoidwarpage
Core Design Contradiction:
StrengthVSShape

Solution Approach 1:

The patent achieves homogeneity by selecting metal layers with thermal expansion coefficients and mechanical properties that closely match those of the semiconductor substrate. This reduces thermal mechanical property mismatches during packaging processes, preventing excessive warpage while maintaining mechanical strength enhancement.

Inventive Principle:
Principle #33Homogeneity

Solution Approach 2:

The patent optimizes parameters including the thickness ratios, material compositions, and deposition sequences of multiple metal layers. By carefully controlling these parameters, the system achieves a balance where the stiffness layers provide mechanical support without creating significant thermal expansion mismatches that would cause warpage.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the substrate thickness is reduced from 50 μm to 25 μm, then the on-resistance is reduced by 24%, but the mechanical strength decreases significantly

Engineering Contradiction:
Improveon-resistanceVSAvoidmechanical strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent uses composite metal layer structures deposited on the thin substrate back surface to compensate for the loss of mechanical strength. The multi-layer composite provides reinforcement that allows the substrate to be thinned from 50 μm to 25 μm or less while maintaining sufficient mechanical strength, thereby achieving the 24% on-resistance reduction without catastrophic strength loss.

Inventive Principle:
Principle #40Composite materials

4Strength

If the substrate thickness is kept above 35 μm, then the mechanical strength safety margin is maintained, but the DC resistance and electrical performance are compromised

Engineering Contradiction:
Improvemechanical strength safety marginVSAvoidelectrical performance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent applies composite metal layer structures on the substrate back surface that provide mechanical reinforcement equivalent to or greater than a 35 μm thick substrate. This allows the use of thinner substrates (less than 35 μm) that offer lower DC resistance and better electrical performance while the composite layers compensate for the reduced mechanical strength, effectively decoupling the mechanical and electrical performance requirements.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves a bending strength of at least 5 Newton per millimeter width and a maximum warpage of less than 10 μm per diagonal length in mm at 245°C solder reflow temperature, effectively addressing the mechanical strength and warpage issues.

Implementation Method 1

A coefficient of thermal expansion of the compound layer is 9 ppm/° C. or less. A glass transition temperature of the compound layer is higher than 150° C.

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

Thick metal layer deposited on wafer back surface also helps to improve current conduction and reduce resistance

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12243808B2Chip scale package (CSP) semiconductor device having thin substrate
Publication Date: 2025.03.04 ALPHA & OMEGA SEMICON INT LP
  • US12243808B2 patent drawing
  • US12243808B2 patent drawing
  • US12243808B2 patent drawing

AI summary

A semiconductor device comprises a semiconductor substrate, a plurality of metal layers, an adhesive layer, a compound layer, and a plurality of contact pads. A thickness of the semiconductor substrate is in a range from 15 μm to 35 μm. A thickness of the compound layer is larger than the thickness of the semiconductor substrate. A coefficient of thermal expansion of the compound layer is less than or equal to 9 ppm/° C. A glass transition temperature of the compound layer is larger than 150° C. The plurality of metal layers comprises a first titanium layer, a first nickel layer, a silver layer, a second nickel layer, and a metallic layer. In a first example, the metallic layer is a second titanium layer. In a second example, the metallic layer is a Titanium Nitride (TiN) layer.