Thin-Substrate CSP Package Structure for Warpage Control
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Solution Overview
Problem
Existing CSP semiconductor devices with thin semiconductor substrates face challenges in maintaining mechanical strength and preventing excessive warpage, which leads to reliability issues and low yield in device fabrication.
Innovation Solution
A CSP semiconductor device with a semiconductor substrate thickness ranging from 15 μm to 35 μm, combined with a metal layer stack and a compound layer having specific thermal expansion and glass transition temperature properties, to enhance mechanical strength and reduce warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the semiconductor substrate is reduced to less than 35 μm, then the DC resistance is reduced and electrical performance is improved, but the mechanical strength decreases and excessive warpage occurs
Solution Approach 1:
The patent applies parameter changes by precisely controlling the semiconductor substrate thickness within the range of 15-35 μm to optimize the balance between electrical performance (reduced DC resistance) and mechanical strength. This specific parameter range resolves the contradiction by finding the optimal thickness that achieves low resistance while preventing excessive warpage and maintaining sufficient mechanical integrity during packaging and operation.
2Strength
If additional stiffness layers are attached onto the wafer back surface, then the mechanical strength is improved, but thermal mechanical property mismatches lead to excessive wafer warpage
Solution Approach 1:
The patent applies homogeneity by selecting a compound layer material with thermal expansion coefficient (9 ppm/°C or less) that closely matches the semiconductor substrate. This minimizes thermal mechanical property mismatches between layers, preventing excessive wafer warpage during temperature cycles while maintaining the mechanical strength provided by the compound layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a bending strength of at least 5 Newton per millimeter width and a maximum warpage of less than 10 μm per diagonal length in mm at 245°C, effectively addressing the mechanical strength and warpage issues.
Implementation Method 1
A coefficient of thermal expansion of the compound layer is 9 ppm/°C. or less. A glass transition temperature of the compound layer is higher than 150°C.
Implementation Method 2
excessive stress between different layers resulting in layer delamination or even die cracking when the device subjects to 245° C. of peak reflow temperature
Data Source
AI summary
A semiconductor device comprises a semiconductor substrate, a plurality of metal layers, an adhesive layer, a compound layer, and a plurality of contact pads. A thickness of the semiconductor substrate is in a range from 15 μm to 35 μm. A thickness of the compound layer is larger than the thickness of the semiconductor substrate. A coefficient of thermal expansion of the compound layer is less than or equal to 9 ppm/° C. A glass transition temperature of the compound layer is larger than 150° C. The plurality of metal layers comprises a first titanium layer, a first nickel layer, a silver layer, a second nickel layer, and a metallic layer. In a first example, the metallic layer is a second titanium layer. In a second example, the metallic layer is a Titanium Nitride (TiN) layer.