Thin Film Depth Profiling via Gaseous Etching
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Solution Overview
Problem
Current methods for characterizing ultra-thin semiconductor layers lack the necessary resolution and accuracy, particularly for advanced semiconductor device structures, due to surface roughness and non-uniform material removal issues associated with wet techniques like anodic oxidation and solution-based chemical etching.
Innovation Solution
The use of gaseous etchants for controlled, residue-free chemical removal of semiconductor layers, allowing for high-resolution measurement of electrical properties without physical contact, using a process chamber with controlled gas delivery and etching processes to achieve precise depth profiling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If wet techniques like anodic oxidation or solution-based chemical etching are used to remove semiconductor material, then material removal is achieved, but surface roughness and non-uniform material removal occur
Solution Approach 1:
The patent replaces wet chemical etching processes with a dry measurement technique using a capacitive sensor. The sensor measures electrical properties through the semiconductor layer without physically removing material, thereby eliminating surface roughness and non-uniform material removal while achieving high-resolution depth profiling through controlled material removal by a small amount of etchant followed by immediate measurement
Solution Approach 2:
The patent applies a minimal amount of etchant to create a shallow trench just enough to expose the underlying structure for measurement, then immediately performs the electrical measurement before significant surface roughness can develop. This preliminary controlled removal enables high-resolution profiling without the harmful effects of extensive wet etching
2Measurement precision
If physical contact measurement methods are used on ultra-thin layers, then electrical properties can be measured, but surface damage and contamination occur
Solution Approach 1:
The patent employs a capacitive sensor that measures electrical properties through non-contact or minimal-contact means. The sensor detects changes in capacitance as material is removed, allowing electrical property measurement without the mechanical contact that causes surface damage and contamination in traditional probe-based methods
Solution Approach 2:
The patent uses the semiconductor layer itself as an intermediary medium for measurement. By measuring electrical properties through the layer as it is being removed, the system obtains data without requiring direct contact with the surface, thus avoiding surface damage while maintaining measurement precision
3Manufacturing precision
If wet etching processes are used for depth profiling, then material removal is achieved, but etchant resistance interferes with continuous measurement
Solution Approach 1:
The patent replaces wet etching with a dry capacitive measurement system that can continuously monitor electrical properties during material removal. The capacitive sensor detects depth changes through dielectric constant variations without being affected by etchant resistance, enabling uninterrupted measurement throughout the depth profiling process
Solution Approach 2:
The patent implements continuous measurement by using a capacitive sensor that operates throughout the entire material removal process. The sensor continuously tracks electrical property changes as the trench deepens, eliminating measurement interruptions that occur with wet etching methods where etchant resistance and solution management interfere with continuous data acquisition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate measurement of ultra-thin semiconductor layers with resolutions better than 0.5 nm, minimizing surface damage and non-uniformities, and allowing continuous electrical property profiling without interference from etchant resistance.
Implementation Method 1
The use of gaseous etchants for controlled, residue-free chemical removal of semiconductor layers
Implementation Method 2
delivering process gas onto a top surface of a semiconductor layer at a test region in a non-contact manner
Data Source
AI summary
Methods, tools and systems for full characterization of thin and ultra-thin layers employed in advanced semiconductor device structures are disclosed.