Thin-Film Pulse Generator for Ferroelectric Memory Switching

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Solution Overview

Problem

The challenge lies in developing pulse generator circuits using printed thin-film processes, particularly with organic thin-film (OTF) materials, where conventional complementary designs face issues due to low yield, high variability, and instability, making it difficult to fabricate all integrated devices simultaneously and limiting device size and pulse width design.

Innovation Solution

A pulse generator circuit design utilizing a minimum number of thin-film transistors (TFTs) with a single polarity, incorporating a capacitor and TFTs functioning as diodes and resistors, along with a ferroelectric memory element, optimized for solution-based printed processes, allowing for the generation of pulses above a voltage threshold for a minimum time interval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional complementary designs are implemented using printed thin-film processes, then circuit functionality is achieved, but yield is low and device stability is poor

Engineering Contradiction:
Improvedevice stabilityVSAvoidfabrication difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses only n-type thin-film transistors throughout the circuit, eliminating the need for both n-type and p-type devices. This homogeneous approach simplifies the manufacturing process and improves device stability, as the patent states that using a single polarity of TFTs 'overcomes the limitations of OTF processes' and enables 'reliable pulse generation'.

Inventive Principle:
Principle #33Homogeneity

Solution Approach 2:

The patent changes the circuit design parameters to accommodate process limitations. Instead of using conventional complementary designs with both n-type and p-type devices, the patent redesigns the circuit to function with only n-type devices, adjusting the circuit topology and transistor configurations to achieve the desired functionality while improving manufacturing ease and device stability.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If device size is reduced to integrate more components, then circuit integration is improved, but parasitic capacitances increase and limit pulse width design

Engineering Contradiction:
Improvecircuit integrationVSAvoidparasitic capacitance
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent addresses the parasitic capacitance issue by changing the circuit topology and transistor sizing relationships rather than simply scaling down all dimensions. The patent describes specific transistor width and length ratios that optimize performance while managing parasitic effects, effectively navigating the dimensional constraints through parameter optimization in the transistor design space.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If only one polarity of devices is formed in the process, then manufacturing complexity is reduced, but device performance is limited

Engineering Contradiction:
Improveprocess simplicityVSAvoiddevice performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent embraces the single-polarity limitation by designing a circuit that uses only n-type TFTs, converting what was previously seen as a performance limitation into a manufacturing advantage. The homogeneous n-type device approach simplifies the printing process while the patent demonstrates that appropriate circuit topology and transistor sizing can achieve the desired pulse generation performance.

Inventive Principle:
Principle #33Homogeneity

Solution Approach 2:

The patent optimizes the performance of single-polarity devices by adjusting key parameters such as transistor channel width, channel length, and threshold voltage through material composition control. These parameter changes enable the n-type-only circuit to achieve functionality equivalent to or better than conventional complementary designs.

Inventive Principle:
Principle #35Parameter changes

4Duration of action of moving object

If pulse width is increased to meet timing requirements, then signal stability is improved, but device size must increase due to process limits

Engineering Contradiction:
Improvepulse widthVSAvoiddevice area
Core Design Contradiction:
Duration of action of moving objectVSArea of moving object

Solution Approach 1:

The patent achieves the desired pulse width without proportionally increasing device area by optimizing transistor sizing ratios and channel dimensions. The patent describes specific relationships between transistor widths and lengths that control pulse duration independently of overall device scaling, allowing pulse width to be adjusted through parameter optimization rather than simple geometric scaling.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables reliable pulse generation suitable for applications like clocking flip-flops and reset signals, overcoming the limitations of OTF processes by ensuring consistent pulse duration and magnitude, even in flexible substrates like polyethylene naphthalate, and is applicable to various solution and inorganic materials.

Implementation Method 1

a ferroelectric memory element communicatively coupled to the output node such that a pulse on the output node may change a state of the ferroelectric memory element

Methodology Applied
Scientific EffectFerroelectric effect: Ferrofluid

Implementation Method 2

a capacitor communicatively connected to the input node and to a pulse line

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8873270B2Pulse generator and ferroelectric memory circuit
Publication Date: 2014.10.28 GENESEE VALLEY INNOVATIONS LLC
  • US8873270B2 patent drawing
  • US8873270B2 patent drawing
  • US8873270B2 patent drawing

AI summary

A pulse generator circuit with ferroelectric memory element is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator. The ferroelectric memory element is coupled to the output node such that a pulse on the output node may change a state of the ferroelectric memory element.