Thin Film Transistor Amorphous Polycrystalline Semiconductor Layer Design

The patent applies local quality by using different semiconductor material structures in different regions: amorphous semiconductor material in the channel region for manufacturing simplicity, and polycrystalline semiconductor material in the source/drain regions for high conductivity. This regional differentiation resolves the contradiction by optimizing each region's material properties according to its functional requirements.

The patent uses composite materials by combining amorphous and polycrystalline semiconductor materials within the same thin film transistor structure. The first semiconductor layer contains amorphous material in the channel portion and polycrystalline material in the source/drain portions, creating a composite structure that simultaneously achieves manufacturing simplicity and high conductivity with reduced hot carrier effects.

The patent segments the contact interface between the first and second semiconductor layers by introducing a third semiconductor layer with intermediate properties. This third layer is positioned between the amorphous first layer and the highly conductive second layer in the source/drain regions, creating a gradual transition that maintains conductivity while reducing hot carrier effects and leakage currents through the segmented structure.

The patent applies parameter changes by controlling the doping concentration of the third semiconductor layer to be between that of the first and second layers. This intermediate doping parameter creates a gradual conductivity transition, allowing the structure to maintain low resistance while reducing the abrupt field changes that cause hot carrier effects and leakage currents.