Thin Film Transistor Interconnects for Stable 3D Semiconductor Layers
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving precise control and stability of electrical connections and disconnections between semiconductor chips, as discussed in Japanese Patent Application Laid-Open No. 2015-133366, which lacks sufficient control accuracy and stability.
Innovation Solution
The semiconductor device incorporates a first and second monocrystalline semiconductor layer with a thin film transistor electrically connected to each semiconductor element without intervention from other semiconductor elements, utilizing a wiring structure and through electrodes for stable electrical pathways, allowing for improved control and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a switch with a core part and heat generation part is used to achieve electrical connection and disconnection, then the switching function is provided, but the control accuracy and stability are insufficient
Solution Approach 1:
The patent replaces the mechanical switch structure (core part contracting and expanding) with a semiconductor-based electrical connection system. The semiconductor element is directly connected to electrodes through conductive structures, eliminating the need for mechanical movement and heat generation, thereby improving control accuracy and stability while reducing structural complexity.
Solution Approach 2:
The patent divides the semiconductor device into separate monocrystalline semiconductor layers, each with its own semiconductor element and conductive structures. This segmentation allows for independent optimization of each connection path, improving overall control accuracy and stability without requiring a complex unified switch mechanism.
2Adaptability or versatility
If multiple semiconductor elements are interconnected to achieve functionality, then the device functionality is enhanced, but the connection complexity increases
Solution Approach 1:
The patent transitions from planar interconnections to three-dimensional vertical connections using conductive structures that extend through insulating films. This dimensional change allows multiple semiconductor elements to be connected through overlapping regions in the vertical direction, reducing lateral connection complexity while maintaining enhanced functionality.
Solution Approach 2:
The patent introduces conductive structures (such as through-electrodes and conductive plugs) as intermediaries between semiconductor elements and external electrodes. These intermediary structures simplify the connection architecture by providing dedicated conduction paths that eliminate the need for complex inter-element wiring networks.
Data Source
AI summary
Embodiments of the present disclosure provide a technique advantageous to an improvement in performance of a semiconductor device. The semiconductor device includes a first monocrystalline semiconductor layer on which a first semiconductor element is arranged, a second monocrystalline semiconductor layer on which a second semiconductor element is arranged, and a thin film transistor electrically connected to the first semiconductor element without an intervention of another semiconductor element arranged on the first monocrystalline semiconductor layer and electrically connected to the second semiconductor element without an intervention of another semiconductor element arranged on the second monocrystalline semiconductor layer.