Thin MEMS Die Vacuum Encapsulation
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Solution Overview
Problem
The existing methods for manufacturing MEMS devices face challenges such as wafer cracking due to stress from thinning the substrate wafer and contamination of wire bonding pads during the etching process, which prevent the formation of compact devices with perpendicular walls and high yield production.
Innovation Solution
A method for vacuum encapsulating MEMS structures at the wafer level, allowing for high-degree thinning of both substrate and capping wafers with tailored flexibility, forming high-aspect-ratio trenches, and preventing polymer contamination of bond pads, by using anisotropic plasma etching and bonding techniques to create a capping chip with perpendicular side surfaces and a recess that encloses the micromechanical structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the substrate wafer is thinned to create a thin MEMS device, then the device thickness is reduced and compactness is improved, but the substrate bows due to high stresses in the top films and cracking occurs
Solution Approach 1:
The method applies a compressive stress layer to the front surface of the substrate wafer before thinning operations. This compressive stress counteracts the tensile stress that develops during thinning, preventing substrate bowing and cracking. The cushioning stress is applied in advance to compensate for the mechanical stresses that will occur during subsequent processing steps.
Solution Approach 2:
The method changes the stress state parameter of the substrate wafer by depositing a compressive stress layer. This alters the mechanical properties of the substrate, transforming it from a state prone to tensile stress and cracking to a state with compensating compressive stress that maintains integrity during thinning operations.
2Ease of manufacture
If wet etching is used to etch the cap wafer, then the etching process is simple, but sloped sidewalls are produced which prevent compact device design
Solution Approach 1:
The method replaces wet chemical etching with plasma-based reactive ion etching (RIE). This substitution changes the etching mechanism from isotropic chemical dissolution to anisotropic physical-chemical etching, enabling perpendicular sidewalls while maintaining processability. The plasma process allows precise control of etch directionality through ion bombardment.
3Shape
If dry etching such as Bosch etching is used to obtain perpendicular sidewalls, then the sidewalls are substantially perpendicular, but polymer passivation leaves Teflon-type polymer film on metal bond pads preventing wire bonding
Solution Approach 1:
The method applies different etching conditions to different regions of the wafer surface. By adjusting etch parameters such as power, pressure, and gas flow locally, the process achieves perpendicular sidewalls in trench regions while preventing polymer deposition on bond pad areas. This spatial variation in etching quality eliminates contamination where it would harm wire bonding.
Solution Approach 2:
The etching process incorporates real-time monitoring and feedback control to detect polymer deposition on bond pads and adjust etch parameters accordingly. When polymer accumulation is detected in specific regions, the process automatically modifies conditions to prevent further contamination while maintaining sidewall perpendicularity in other regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents wafer cracking, allows for compact device design with perpendicular walls, and ensures clean bond pads, enabling high-yield manufacturing of thin MEMS devices with reduced stress and polymer contamination.
Implementation Method 1
a method for vacuum encapsulating MEMS structures at the wafer level, allowing for high-degree thinning of both substrate and capping wafers with tailorable flexibility, forming high-aspect-ratio trenches, and preventing polymer contamination of bond pads, by using anisotropic plasma etching and bonding techniques
Data Source
AI summary
An integrated MEMS electronic circuit that comprises a circuit wafer; a micromechanical structure being attached to a first surface of the circuit wafer and electrically coupled to an integrated circuit formed under said first surface. A capping chip having side surfaces substantially perpendicular to its main surfaces comprises a recess and is bonded to the first surface of the circuit wafer such that said micromechanical structure is enclosed in a cavity comprising the recess in the capping chip. Both the circuit wafer and the capping wafer can be further thinned while exposing at least one connection pad on the first surface of the circuit wafer that is not covered by the capping chip and that is coupled electrically to the integrated circuit.