Three-Stage Output Driver for Thin-Oxide 1.8V/3.3V IO

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Solution Overview

Problem

Conventional output driving circuits for semiconductor devices face reliability issues when operating with high voltage interfaces, particularly when transitioning between 1.8 V and 3.3 V, due to the decreased thickness of the oxide layer in current process technologies, making it difficult to maintain reliable gate-source, gate-drain, and drain-source voltage conditions.

Innovation Solution

The proposed output driving circuit employs a three-stage cascode structure with NMOS transistors and PMOS transistors in a series configuration, including an internal resistor and an inverter, to manage voltage levels and feedback signals, ensuring the reliability of the device by maintaining voltage differences within safe limits across the transistors, even when the external high voltage is applied.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If CMOSFETs with medium gate oxide for 1.8V operation are used, then high-speed operation is achieved, but the circuit cannot work properly when 3.3V is applied

Engineering Contradiction:
Improveoperation speedVSAvoidvoltage compatibility
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The output driving circuit is divided into multiple stages: a first output driving circuit for 1.8V operations and a second output driving circuit for 3.3V operations. Each stage uses transistors with gate oxides optimized for its specific voltage range, allowing the system to achieve high-speed operation at 1.8V while maintaining reliability when 3.3V is applied through proper voltage selection and control logic.

Inventive Principle:
Principle #1Segmentation

2Speed

If the oxide layer thickness is decreased for higher speed operation, then operation speed increases, but reliability deteriorates due to inability to maintain safe voltage differences

Engineering Contradiction:
Improveoperation speedVSAvoiddevice reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

A control logic unit acts as an intermediary between the external voltage source and the output driving circuits. It receives the external voltage signal, determines whether it is 1.8V or 3.3V, and activates the appropriate output driving circuit accordingly. This intermediary ensures that transistors with thin gate oxides are only exposed to safe voltage levels (1.8V), maintaining reliability while enabling high-speed operation when needed.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically changes operational parameters by selecting different output driving circuits based on the external voltage level. When 1.8V is detected, the first output driving circuit with thin-gate transistors is activated for high-speed operation. When 3.3V is detected, the second output driving circuit with thick-gate transistors is activated to maintain reliability, thus adapting the voltage parameter to match the transistor characteristics.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a single output driving circuit is used for both 1.8V and 3.3V operations, then device complexity is reduced, but voltage control precision deteriorates

Engineering Contradiction:
Improvecircuit complexityVSAvoidvoltage control precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The output driving circuit system is designed to be dynamic rather than static. The control logic continuously monitors the external voltage level and dynamically switches between the first and second output driving circuits based on whether 1.8V or 3.3V is applied. This dynamic adaptation ensures precise voltage control for each operating condition, preventing the reliability issues that would arise from using a single fixed circuit design.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10348301B2Output driving circuit
Publication Date: 2019.07.09 SK HYNIX INC
  • US10348301B2 patent drawing
  • US10348301B2 patent drawing
  • US10348301B2 patent drawing

AI summary

The output driving circuit include a pull-down driver, an input/output (IO) control logic, a gate control logic, and an inverter. The pull-down driver includes first, second, and third transistors that are sequentially coupled between a pad and a ground node. The IO control logic is configured to receive a clock signal and an enable signal, and transfer a first control signal to the third transistor. The gate control logic is configured to receive a voltage of the pad and output a feedback voltage to a gate electrode of the first transistor. The inverter is configured to invert the enable signal and transfer an inverted enable signal to the gate control logic. Therefore, the reliability of the output driving circuit can be improved.