Thin-Oxide Level Shifter Circuit for Safe High-Voltage Translation
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Solution Overview
Problem
Current level shifter designs require thicker gate oxide layers for voltage shifting, which increases processing costs and time, and existing thin oxide transistors face overvoltage limitations when shifting between different voltage levels.
Innovation Solution
A level shifter apparatus using thin-oxide transistors with cross-coupled transistor stacks and diode-connected transistors to stabilize output nodes, reducing overvoltage conditions and enabling voltage shifting between 0.65 V to 1.65 V without thick-oxide transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If thicker gate oxide layers are used for level shifters, then voltage shifting capability is improved, but processing cost and time increase due to additional masks
Solution Approach 1:
The patent changes the electrical parameters of thin-oxide transistors through bias voltage control and circuit configuration to enable them to handle high voltage signals. By adjusting the operating parameters (gate voltages, bias conditions) rather than changing the physical oxide thickness, the transistors can shift voltages from 0.65V to 1.65V while remaining compatible with standard thin-oxide fabrication processes
Solution Approach 2:
The patent makes thin-oxide transistors multi-functional by enabling them to perform both low-voltage logic operations and high-voltage level shifting tasks. The same thin-oxide transistors used for bulk logic can now also function as level shifters, eliminating the need for separate thick-oxide transistor devices and their associated processing steps
2Ease of manufacture
If thin oxide transistors are used for voltage shifting, then processing cost is reduced, but overvoltage limitations occur
Solution Approach 1:
The patent introduces bias voltage sources and intermediate control signals as mediators between the thin-oxide transistors and high voltage inputs. These intermediary elements control the transistor operating conditions, ensuring that voltage transitions occur within safe operating ranges while still achieving the desired high-voltage level shifting output
Solution Approach 2:
The patent employs dynamic control of transistor operating states through time-varying bias voltages and control signals. The transistors dynamically transition between different operating regions (cutoff, triode, saturation) to safely handle voltage transitions, preventing overvoltage damage while maintaining signal integrity during the shifting process
3Adaptability or versatility
If conventional level shifter designs are used, then voltage level shifting is achieved, but power consumption increases
Solution Approach 1:
The patent employs periodic or pulsed control signals to activate level shifting operations only when needed, rather than maintaining continuous conduction paths. The bias voltages and control signals are applied periodically to enable voltage transitions only during active switching events, reducing continuous power dissipation in the transistor stacks
Solution Approach 2:
The patent segments the voltage shifting function across multiple transistor stacks with distributed bias control, allowing independent optimization of each stack's power consumption. By dividing the level shifting task across separate transistor groups that can be independently controlled, the overall power consumption is reduced compared to a single large-level shifter circuit
Data Source
AI summary
A level shifter may include a first transistor stack including at least four transistors arranged from a first voltage source to ground, including second and third transistors coupled with bias voltage source, and a fourth transistor coupled with an input to receive an input signal at a second voltage or ground. The level shifter may include a second transistor stack comprising at least four transistors arranged from the first voltage source to ground, including second and third transistors coupled with the bias voltage source, and a fourth transistor to receive an inverse of the input signal. A first transistor of the first transistor stack is cross-coupled with a first transistor of the second transistor stack. A level shifter may include a first output coupled with the second transistor stack between the second and third transistors to provide a first output signal at the first voltage or ground.


