Semiconductor Package Layout for Thin Profile and Direct Heat Spreading

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Solution Overview

Problem

Existing semiconductor package structures using flip die technology are not thin enough to meet thinning requirements, and current fan-out packages with heat spreaders suffer from inefficient heat dissipation due to the heat being transferred through molding material.

Innovation Solution

A semiconductor package design that incorporates a redistribution process to reduce overall thickness to less than 0.15 mm, combined with a heat spreader on the bottom surface of the die to enhance heat dissipation efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If flip die technology is used to attach the die to the substrate, then the die can be electrically connected to the substrate, but the overall package thickness cannot be reduced below 0.15 mm

Engineering Contradiction:
Improvepackage thicknessVSAvoidmanufacturing complexity
Core Design Contradiction:
Length of moving objectVSEase of manufacture

Solution Approach 1:

The patent inverts the conventional flip-chip architecture by placing the active surface of the die facing downward toward the substrate, while the passive surface faces upward. This inversion allows the die to be attached in a orientation that enables thinner packaging while maintaining electrical connectivity through the conductive bumps on the active surface.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent transitions from traditional three-layer stacking (substrate-die-package) to a more integrated configuration where the die is directly mounted on the substrate with conductive bumps establishing electrical connections in the vertical dimension, enabling package thickness to be reduced to below 0.15 mm while maintaining functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of energy

If the heat spreader is attached to the molding material that seals the die, then the die is protected and sealed, but heat dissipation efficiency is reduced because heat must be transferred through the molding material

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoiddie protection
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent extracts the heat spreader from its conventional position within the molding material and relocates it to the substrate beneath the die. This extraction eliminates the thermal barrier of the molding material, allowing heat to be conducted directly from the die to the heat spreader without passing through the encapsulant, thereby significantly improving heat dissipation efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate serves as an intermediary thermal pathway between the die and the heat spreader. By positioning the heat spreader on the substrate directly beneath the die, the substrate acts as a thermal mediator that efficiently conducts heat away from the die without requiring the heat to pass through the molding material, thus resolving the contradiction between heat dissipation and die protection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution effectively reduces the semiconductor package thickness while significantly improving heat dissipation efficiency by directly transferring heat from the die to the heat spreader.

Implementation Method 1

heat is first transferred to the molding material and then to the heat spreader before it dissipates

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250062265A1Semiconductor package and manufacturing method thereof
Publication Date: 2025.02.20 ORIENT SEMICONDUCTOR ELECTRONICS LTD
  • US20250062265A1 patent drawing
  • US20250062265A1 patent drawing
  • US20250062265A1 patent drawing

AI summary

The present disclosure provides a semiconductor package. The semiconductor package includes a heat spreader, a first die, a plurality of first conductive bumps, a molding layer and a redistribution layer. The first die is disposed on the heat spreader and has a top surface and a bottom surface opposing to the top surface. The first conductive bumps are disposed on the top surface of the first die and electrically connected to the first die. The molding layer is formed on the heat spreader to cover the top surface of the first die and expose the first conductive bumps. The redistribution layer is disposed on the molding layer to electrically connect to the first conductive bumps. The present disclosure further provides a method of manufacturing the above semiconductor package.