Thin Wafer Lamination Structure for Warp-Suppressed 3D Stacking
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Solution Overview
Problem
The typical wafer-on-wafer (WOW) process for manufacturing semiconductor devices with a three-dimensional structure results in asymmetric laminated configurations, leading to warping issues due to face-to-back bonding, which becomes more pronounced as the number of wafer bonds increases, compromising precision in processing steps.
Innovation Solution
A semiconductor device manufacturing method involving a reinforced wafer structure with a temporary adhesive layer, allowing for symmetrical lamination through face-to-face or back-to-back bonding, reducing warping by using polymerizable group-containing polyorganosilsesquioxane adhesives and a controlled curing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If face-to-back bonding is used for wafer lamination, then the bonding process is simple and can be continuously implemented, but the wafer laminate develops warping that accumulates with increasing number of wafers
Solution Approach 1:
The patent applies asymmetry by introducing a supporting substrate that is bonded to only one surface (element forming surface) of the wafer, creating an asymmetric laminated configuration. This asymmetric structure counterbalances the warping forces generated by face-to-back bonding, enabling the laminate to maintain flatness even as the number of wafers increases.
2Productivity
If multiple wafers are laminated to increase device density, then the semiconductor device integration is improved, but the warping of the wafer laminate increases and compromises processing precision
Solution Approach 1:
The supporting substrate acts as an intermediary element between the wafers and the bonding process. It provides mechanical support and stabilizes the wafer laminate structure, enabling multiple wafers to be laminated without excessive warping that would compromise processing precision.
Solution Approach 2:
By creating an asymmetric laminated configuration with the supporting substrate bonded to only one wafer surface, the patent counterbalances warping forces, allowing high device integration density to be achieved while maintaining manufacturing precision.
3Volume of moving object
If the wafer is thinned to reduce device thickness, then the final device size is reduced, but the wafer becomes more susceptible to damage during processing
Solution Approach 1:
The supporting substrate is bonded to the wafer before the thinning process. This preliminary action provides mechanical reinforcement to the wafer, allowing it to be thinned to reduced thickness while the supporting substrate prevents damage during subsequent processing steps.
Solution Approach 2:
The patent creates a composite structure by bonding the supporting substrate to the wafer. This composite material system combines the thin wafer (for reduced device thickness) with the stronger supporting substrate (for mechanical strength), achieving both goals simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively suppresses warping in the wafer laminate, enabling efficient multilayering of thin wafers while maintaining high heat resistance and reducing damage to semiconductor elements, thus improving processing precision and device performance.
Implementation Method 1
a temporary adhesive layer for forming temporary adhesion, the temporary adhesive layer being provided between the element forming surface side of the wafer and the supporting substrate
Implementation Method 2
using polymerizable group-containing polyorganosilsesquioxane adhesives and a controlled curing process
Implementation Method 3
the wafer of the reinforced wafer is ground from the back surface side to form a thinned wafer
Implementation Method 4
the surface of the reinforced wafer and the surface of another wafer including an element forming surface and a back surface opposite from the element forming surface are bonded to form a wafer laminate
Data Source
AI summary
Provided is a semiconductor device manufacturing method in which semiconductor elements are formed into multiple layers through the lamination of wafers in which the semiconductor elements are fabricated, the method being suited for efficiently creating multiple layers of thin wafers while suppressing warping of a wafer laminate. The method of the present invention includes a preparation step, a thinning step, a bonding step, a removal step, and a multilayering step. In the preparation step, a reinforced wafer is prepared, the reinforced wafer having a laminated structure that includes: a wafer including an element forming surface and a back surface opposite from the element forming surface; a supporting substrate; and a temporary adhesive layer for forming temporary adhesion, the temporary adhesive layer being provided between the element forming surface side of the wafer and the supporting substrate.