Thinned Semiconductor Chip Etching for Microdefect Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Thinned semiconductor wafers with edge microdefects from sawing processes are unsuitable for active devices, leading to reduced usable area and increased handling issues, as existing methods like sawing and laser separation introduce defects and are inefficient for thin wafers.
Innovation Solution
The use of etching technology to pattern and separate thinned semiconductor chips, which minimizes microdefects and allows for the introduction of semiconductor structures in edge regions, using an etching-resistant and adhesive layer for connection to circuit carriers, enabling cost-effective production with improved edge side properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If sawing technology is used to separate thinned semiconductor wafers, then separation can be achieved, but microcracks and microdefects propagate from the sawing track in the edge regions, reducing usable area and rendering devices unusable
Solution Approach 1:
The patent replaces the mechanical sawing process with a chemical etching process to separate the thinned semiconductor wafer. The etching process uses chemical reactions to remove material along predetermined separation lines without the mechanical contact that causes microcracks and defects. This substitution of mechanical action with chemical action resolves the contradiction by achieving separation while preserving edge region quality.
Solution Approach 2:
The patent introduces an etching-resistant layer as an intermediary element in the separation process. This layer is applied to the semiconductor wafer before etching and serves as a mask that protects certain regions while allowing etching in separation regions. The intermediary layer enables precise chemical separation without mechanical contact, thereby avoiding defects while maintaining manufacturing feasibility.
2Reliability
If the semiconductor wafer is thinned to less than 100 μm, then the on resistance is reduced and active structures are optimized, but handling problems increase and the wafer becomes practically no longer handleable
Solution Approach 1:
The patent employs an intermediate carrier as a mediator to support the thinned semiconductor wafer during the etching and handling processes. The carrier provides mechanical support to the fragile thin wafer, enabling handling and processing without direct manipulation of the wafer itself. This intermediary support system resolves the contradiction by maintaining ease of operation while enabling the production of high-performance thinned devices.
Solution Approach 2:
The patent applies the etching-resistant layer and attaches the wafer to the intermediate carrier before the thinning and separation processes. These preliminary actions prepare the wafer for subsequent handling and processing steps, ensuring that the thinned structure can be managed effectively. By performing these preparatory steps in advance, the patent enables easy handling of thinned wafers while achieving the desired thin profile for optimal device performance.
3Productivity
If conventional sawing processes are used, then separation is achieved, but a multiplicity of dislocations and crystal defects are injected in the monocrystalline semiconductor wafer material, making edge side regions unsuitable for active devices
Solution Approach 1:
The patent replaces the mechanical sawing system with a chemical etching system to perform separation. The etching process uses chemical reactions to remove material along separation lines without the mechanical forces that generate dislocations and crystal defects. This substitution maintains productivity through efficient chemical removal while preserving the monocrystalline structure integrity, enabling active devices to be placed in edge side regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in semiconductor devices with up to 30% increased usable area, reduced defect propagation, and cost-effective production by maintaining the monocrystalline structure integrity, avoiding the need for complex handling and relamination processes.
Implementation Method 1
the use of etching technology to pattern and separate thinned semiconductor chips
Implementation Method 2
an etching-resistant and adhesive layer for connection to circuit carriers
Data Source
AI summary
A semiconductor device with a thinned semiconductor chip and a method for producing the latter is disclosed. In one embodiment, the thinned semiconductor chip has a top side with contact areas and a rear side with a rear side electrode. In this case, the rear side electrode is cohesively connected to a chip pad of a circuit carrier via an electrically conductive layer. In another embodiment, the thinned semiconductor chips of this semiconductor device according to the invention have low-microdefect edge side regions with semiconductor element structures and edge sides patterned by etching technology.