Thinned Semiconductor Chip Stacks for Warpage Control

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Solution Overview

Problem

Embedded wafer-level ball-grid arrays (eWLBs) face challenges with warpage and cross-talk issues due to thick semiconductor dies, leading to unpredictable warping and RF signal interference, while thin dies reduce warping but suffer from severe warpage and increased costs.

Innovation Solution

A method involving stacks of thinned semiconductor chips with a polymer layer and a further layer, where the polymer layer acts as a backside protection and the further layer provides mechanical stability, allowing for reduced warpage and cross-talk by adjusting the thermal expansion coefficient and eliminating the need for grinding, thus minimizing warpage and RF interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If thick semiconductor dies are used in eWLB configuration, then mechanical stability is improved, but warpage becomes severe and unpredictable during RDL processes

Engineering Contradiction:

Improvemechanical stabilityVSAvoidwarpage control

Core Design Contradiction:

Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The thick semiconductor die is segmented into multiple thin semiconductor layers, each with thickness of 5-50 μm. This segmentation reduces the overall warpage while maintaining mechanical stability through the layered structure, directly resolving the contradiction between mechanical stability and warpage control.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent creates a composite structure by bonding multiple thin semiconductor layers together to form a reconstituted wafer. This composite approach combines the advantages of thin layers (low warpage) while achieving the mechanical stability of thicker structures, resolving the contradiction between mechanical stability and warpage control.

Inventive Principle:

Principle #40Composite materials

2Manufacturing precision

If thinned semiconductor wafers are used to reduce warpage, then warpage behavior improves, but severe warping occurs and adjustment becomes impossible

Engineering Contradiction:

Improvewarpage controlVSAvoidprocess reliability

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by bonding multiple thin semiconductor layers together before the RDL processing steps. This pre-assembly creates a stable reconstituted wafer that maintains consistent warpage behavior throughout subsequent processing, preventing the severe warping and reliability issues that occur with single thinned wafers.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The multi-layer structure acts as a cushioning mechanism against warpage variations. By distributing the mechanical stress across multiple layers bonded together, the structure compensates for individual layer variations and prevents severe warping, ensuring process reliability.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Strength

If standard thick chips are used in eWLB, then structural integrity is maintained, but RF signal cross-talk increases due to signal spreading in bulk material

Engineering Contradiction:

Improvestructural integrityVSAvoidRF cross-talk

Core Design Contradiction:

StrengthVSObject-generated harmful factors

Solution Approach 1:

The thick semiconductor die is divided into multiple thin layers, which reduces the bulk material volume through which RF signals can spread. This segmentation maintains structural integrity through the bonded layer structure while reducing RF cross-talk by limiting signal propagation paths in the bulk material.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent uses thin semiconductor films (5-50 μm per layer) to replace the thick bulk material. These thin films maintain the necessary structural integrity for handling and processing while significantly reducing RF signal spreading and cross-talk compared to thick chips.

Inventive Principle:

Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method results in a more reliable chip package with reduced warpage, lower costs, and improved RF behavior by maintaining mechanical stability and preventing RF signal coupling, while avoiding grinding-induced grooves and scrap due to severe warpage.

Implementation Method 1

wherein the further layer comprises at least one of a semiconductor layer, an insulating layer, and a metal layer, and wherein the polymer layer and the further layer are attached to each other

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

joining the plurality of stacks with each other with an encapsulation material to form the chip arrangement

Methodology Applied

Scientific EffectBonding: Welding

Data Source

PatentUS10930541B2Method of forming a chip arrangement, chip arrangement, method of forming a chip package, and chip package

Publication Date: 2021.02.23 INFINEON TECHNOLOGIES AG

AI summary

A method of forming a chip arrangement is provided. The method includes: arranging a plurality of stacks on a carrier, each stack including a thinned semiconductor chip, a further layer, and a polymer layer between the further layer and the chip, each stack being arranged with the chip facing the carrier; joining the plurality of stacks with each other with an encapsulation material to form the chip arrangement; exposing the further layer; and forming a redistribution layer contacting the chips of the chip arrangement.