Thinned Si Substrate for Thick GaN Epitaxy
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Solution Overview
Problem
The maximum thickness of GaN layers grown on Si substrates is limited by the difference in coefficient of thermal expansion (CTE) between GaN and Si, leading to cracking during cooling, necessitating the use of more expensive substrates for thicker layers.
Innovation Solution
Bonding a Si substrate to a support substrate with a CTE more closely matched to the III-N material, thinning the Si substrate to 100 μm or less, and forming the III-N material on the thinned Si surface to reduce thermal stress and allow for thicker, high-quality GaN layers without cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If GaN is deposited on Si substrate to increase thickness for better crystal quality, then crystal quality improves, but cracking occurs during cooling due to CTE mismatch
Solution Approach 1:
The substrate system is segmented into three distinct layers: Si substrate, buffer layer, and GaN layer. Each layer serves a specific function - the Si substrate provides mechanical support and cost advantage, the buffer layer acts as a transition zone to accommodate CTE mismatch, and the GaN layer provides the desired crystal quality. This segmentation allows the system to overcome the CTE mismatch limitation between Si and GaN.
Solution Approach 2:
A buffer layer is introduced as an intermediary between the Si substrate and GaN layer. This buffer layer has a coefficient of thermal expansion that is intermediate between Si and GaN, serving as a transition zone that gradually accommodates the thermal expansion difference. The buffer layer absorbs the thermal stress that would otherwise cause cracking in thick GaN layers on Si substrates during cooling.
2Productivity
If thicker GaN layers are deposited on Si substrate, then device performance improves, but the maximum thickness is limited to 6-8 μm due to CTE difference
Solution Approach 1:
The buffer layer serves as a mediator that reduces thermal stress transmission from the Si substrate to the GaN layer. By having an intermediate CTE value, the buffer layer creates a gradual transition in thermal expansion properties, reducing the abrupt stress concentration at the GaN-Si interface and enabling thicker GaN layers to be deposited without cracking.
Solution Approach 2:
The system changes the thermal expansion parameter distribution by introducing a buffer layer with intermediate CTE properties. This parameter modification allows the structure to accommodate thermal expansion differences through gradual transition rather than abrupt change, reducing thermal stress and enabling increased GaN layer thickness beyond the conventional 6-8 μm limit.
3Productivity
If expensive substrates such as SiC, sapphire or pure GaN substrates are used, then thicker GaN layers can be deposited, but manufacturing cost increases
Solution Approach 1:
The Si substrate, which is inexpensive and widely available, is used as a disposable or sacrificial base layer. Although it has CTE mismatch issues, it successfully serves its purpose of providing a cost-effective platform for growing the GaN layer. The buffer layer compensates for the Si substrate's limitations, allowing the system to achieve thick GaN layer deposition without requiring expensive alternative substrates.
Solution Approach 2:
The patent creates a composite substrate structure consisting of Si substrate and buffer layer combined. This composite material system leverages the advantages of both components: the Si substrate provides low cost and mechanical strength, while the buffer layer provides thermal expansion compatibility. The composite structure achieves performance comparable to expensive single-material substrates at lower cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the deposition of thick, high-quality GaN layers using inexpensive Si substrates, reducing the likelihood of cracking and improving device performance by matching the CTE of the support substrate to the III-N material, thus overcoming the thickness limitations of GaN on Si.
Implementation Method 1
The support substrate has a coefficient of thermal expansion more closely matched to that of the III-N material than the Si substrate
Implementation Method 2
thinning the Si substrate at the (111) growth surface to a thickness of 100 μm or less
Implementation Method 3
Deposition of GaN is typically done at temperatures around 1000° C. (e.g. 1000-1200° C. for MOCVD—metal organic chemical vapor deposition)
Data Source
AI summary
A method of manufacturing an III-N substrate includes bonding a Si substrate to a support substrate, the Si substrate having a (111) growth surface facing away from the support substrate, thinning the Si substrate at the (111) growth surface to a thickness of 100 μm or less, and forming III-N material on the (111) growth surface of the Si substrate after the Si substrate is thinned. The support substrate has a coefficient of thermal expansion more closely matched to that of the III-N material than the Si substrate. Other methods of manufacturing an III-N substrate are disclosed, as well as the corresponding wafer structures.