Thread Assignment in Heterogeneous CPU for Gaming Power

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Solution Overview

Problem

Existing multi-cluster heterogeneous processor architectures fail to optimize performance and power conservation effectively in display-intensive and power-consuming applications like gaming on portable computing devices, leading to performance vs. power trade-offs.

Innovation Solution

A method and system for prioritizing and assigning threads in a CPU architecture by ranking workload levels and assigning each thread to a single CPU core based on these rankings, ensuring dedicated core usage during a vSync window to optimize performance and power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If threads are dynamically assigned to different CPU cores based on workload, then power consumption is reduced, but frame rendering consistency deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidframe rendering consistency
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system pre-assigns threads to specific CPU cores before execution begins. The scheduler identifies which threads will be executed and assigns them to specific cores in advance, creating a predetermined mapping that remains consistent throughout the execution of a frame rendering cycle. This preliminary assignment eliminates runtime migration and ensures consistent core usage patterns.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system segments the CPU execution space by dedicating specific cores to specific threads for the duration of a frame rendering cycle. Instead of allowing any thread to run on any core, the scheduler creates distinct assignments where Thread A is assigned to Core X and Thread B to Core Y, preventing workload migration and maintaining stable core utilization patterns.

Inventive Principle:
Principle #1Segmentation

2Productivity

If high-performance CPU cores are used for all rendering tasks, then frame rate is improved, but power consumption increases

Engineering Contradiction:
Improveframe rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system applies local quality by matching thread characteristics with CPU core characteristics. The scheduler analyzes which threads are CPU-bound and require high-performance cores, versus which threads can execute on lower-power cores. This selective assignment ensures that high-performance cores are utilized only when necessary for specific computational tasks, while other cores operate at lower power states.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes the operational parameters of CPU cores dynamically based on thread assignment. When a thread is assigned to a high-performance core, that core operates at higher frequency and voltage. When cores are idle or handling less demanding threads, they operate at lower power states. This parameter adjustment optimizes the balance between performance and power consumption.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If thread migration between cores is allowed, then load balancing is improved, but performance consistency deteriorates

Engineering Contradiction:
Improveload balancingVSAvoidperformance consistency
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The scheduler performs preliminary load balancing by assigning threads to cores before execution begins. It analyzes the workload characteristics and distributes threads across available cores to balance the load. Once assigned, threads remain on their designated cores for the duration of the frame rendering cycle, preventing migration and maintaining performance consistency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements dynamic load balancing at the scheduling boundary rather than during execution. The scheduler dynamically adjusts thread assignments based on current workload conditions, but once a frame rendering cycle begins, the assignments become static. This dynamic-static hybrid approach allows load balancing when needed while maintaining stability during execution.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240330061A1Systems and methods for prioritizing and assigning threads in a heterogeneous processor architecture
Publication Date: 2024.10.03 QUALCOMM INC
  • US20240330061A1 patent drawing
  • US20240330061A1 patent drawing
  • US20240330061A1 patent drawing

AI summary

A method and system for prioritizing and assigning threads in a heterogenous CPU architecture includes receiving input to create frames on a display device of a PCD. Next, threads of execution responsible for creating the frames and which correspond to a number of first CPU cores in the CPU architecture are identified. The CPU architecture includes first CPU cores and second CPU cores, where each first CPU core has a first processing capacity and each second CPU core has a second processing capacity. The first processing capacity is greater than the second processing capacity. For a predetermined time period, a ranking of the threads according to their workload levels is created. And then a present workload level of each first CPU core is determined. A ranking of the first CPU cores according to their present workload levels is created followed by assigning each thread to a single first CPU core.