Thread-Aware Power Management Controller for Multicore Processors

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Solution Overview

Problem

The increasing power requirements and energy consumption of computing systems, driven by advances in semiconductor processing and software inefficiencies, necessitate more efficient power management techniques to conserve energy, especially in systems with multiple hardware threads and cores.

Innovation Solution

Implementing thread-aware power management that prioritizes power management actions based on thread execution and priority, allowing for throttling of lower priority threads while maintaining maximum performance for higher priority threads, and utilizing integrated voltage regulators for fine-grained control of voltage and frequency across cores.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If power management actions are applied uniformly across all cores, then overall power consumption is reduced, but performance of critical applications deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidperformance of critical applications
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent segments power management control to the thread level rather than applying uniform control across all cores. The power management controller receives individual thread priority information from the scheduler and applies differentiated power management actions to threads based on their priority levels, allowing critical high-priority threads to maintain full performance while lower-priority threads undergo power management actions such as throttling or migration to less powerful cores.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by applying different power management characteristics to different threads based on their specific priority requirements. High-priority threads receive quality-preserving treatment with minimal power management interference, while low-priority threads receive more aggressive power management. This localized differentiation resolves the contradiction by ensuring that power reduction actions do not uniformly impact all applications, thereby protecting critical performance while achieving overall energy savings.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If thread-aware power management is implemented, then energy efficiency is improved, but system complexity increases

Engineering Contradiction:
Improveenergy consumptionVSAvoidpower management system complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent introduces a power management controller as an intermediary component that sits between the scheduler and the execution cores. This controller receives thread priority information from the scheduler, determines appropriate power management actions based on thread priority, and executes these actions by controlling core frequency, voltage, or thread migration. By centralizing the decision-making logic in this intermediary component, the system achieves thread-aware power management without requiring complex modifications to each core or the scheduler itself, thus managing complexity effectively.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements feedback mechanisms where the power management controller continuously monitors thread priority information from the scheduler and adjusts power management actions accordingly. The controller receives real-time information about which threads are scheduled on which cores and modifies frequency, voltage, or migration decisions based on this feedback. This closed-loop feedback approach enables dynamic energy optimization while maintaining system stability and performance requirements, resolving the complexity issue through structured information flow rather than ad-hoc control logic.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10386900B2Thread aware power management
Publication Date: 2019.08.20 INTEL CORP
  • US10386900B2 patent drawing
  • US10386900B2 patent drawing
  • US10386900B2 patent drawing

AI summary

In an embodiment, a power management controller is to receive thread information from a scheduler, where the thread information includes thread priority information for a thread scheduled to a core of a multicore processor. The power management controller is further to receive power consumption information from a power controller and to determine a power management action to be taken by the power controller on at least one core based at least in part on the thread priority information. Other embodiments are described and claimed.