Intelligent Thread Dispatch Vectorizing Atomic Operations

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Solution Overview

Problem

Conventional techniques for thread dispatch in parallel graphics processing cause data disruption across compute clusters and scalarization of atomics, leading to inefficiencies in processing and throughput, particularly in machine learning applications.

Innovation Solution

An intelligent thread dispatch mechanism that prefetches thread group input data and vectorizes atomic operations, allowing for efficient parallel processing by clustering similar threads and using vectorized lock operations to avoid scalarization, thereby enhancing processing efficiency and reducing data disruption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional thread dispatch techniques are used, then implementation is simple, but data disruption occurs across compute clusters and processing efficiency deteriorates

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidthread dispatch complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system performs preliminary actions by prefetching thread group input data into caches before the threads are fully loaded and executed. This advance data preparation reduces data disruption during execution and improves processing efficiency without requiring complex real-time data management mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intelligent thread dispatch mechanism that acts as an intermediary between the conventional thread dispatch system and the compute clusters. This intermediary optimizes thread grouping and data flow, reducing data disruption while maintaining manageable system complexity through intelligent scheduling algorithms.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If scalarization of atomics is applied, then implementation is straightforward, but processing throughput deteriorates

Engineering Contradiction:
Improveprocessing throughputVSAvoidatomic operation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple scalar atomic operations into vectorized atomic operations that can process multiple elements simultaneously. By combining what would otherwise require separate scalar operations into unified vector operations, the system achieves higher throughput while managing complexity through standardized vector atomic instruction sets.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system changes the parameter of atomic operations from scalar (single-element) to vector (multi-element) form. This parameter transformation enables parallel processing of multiple atomic operations simultaneously, dramatically improving throughput for machine learning workloads that require extensive atomic operations.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If vectorized atomic operations are implemented, then processing efficiency improves, but implementation complexity increases

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidvectorization implementation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The intelligent thread dispatch mechanism automatically performs vectorization of atomic operations without requiring manual intervention or complex external configuration. The system self-adapts to identify opportunities for vectorization and applies them automatically, improving parallel processing efficiency while keeping the user-facing complexity low.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11379235B2Intelligent thread dispatch and vectorization of atomic operations
Publication Date: 2022.07.05 INTEL CORP
  • US11379235B2 patent drawing
  • US11379235B2 patent drawing
  • US11379235B2 patent drawing

AI summary

A mechanism is described for facilitating intelligent dispatching and vectorizing at autonomous machines. A method of embodiments, as described herein, includes detecting a plurality of threads corresponding to a plurality of workloads associated with tasks relating to a graphics processor. The method may further include determining a first set of threads of the plurality of threads that are similar to each other or have adjacent surfaces, and physically clustering the first set of threads close together using a first set of adjacent compute blocks.