Thread Grouped CAS Access Using Segmented Global Flags

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Solution Overview

Problem

The high failure rate and increased overheads of compare and swap (CAS) operations in multi-thread concurrency scenarios due to the exponential increase in the number of concurrent threads and cores, leading to bottlenecks in computer performance.

Innovation Solution

Divide a global variable controlling thread access into multiple variable sub-areas, group threads into corresponding sub-groups, and allow each group to modify a distinct sub-area flag bit independently, ensuring successful modifications and reducing resource waste.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple threads concurrently perform CAS operations on a single global variable, then thread synchronization is ensured, but the failure rate of CAS operations increases and overheads increase exponentially

Engineering Contradiction:
Improvethread synchronizationVSAvoidCAS operation success rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides a single global variable into multiple sub-areas (e.g., first sub-area, second sub-area, third sub-area), each capable of being independently modified by different thread groups. This segmentation allows parallel CAS operations on different sub-areas without conflict, thereby reducing the failure rate and overheads while maintaining synchronization reliability through the coordinated use of these segmented regions.

Inventive Principle:
Principle #1Segmentation

2Speed

If multiple threads concurrently access shared data, then concurrency speed increases, but the failure rate of CAS operations increases and resource waste increases

Engineering Contradiction:
Improveconcurrency speedVSAvoidresource waste
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

By segmenting the global variable into multiple sub-areas and assigning different sub-areas to different thread groups, the patent enables higher concurrency speed as multiple threads can successfully access and modify different sub-areas simultaneously. This reduces the failure rate of CAS operations and minimizes resource waste by eliminating the need for repeated retry attempts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of the global variable by dividing it into multiple sub-areas with different accessibility characteristics. Each sub-area can be independently modified by specific thread groups, transforming the single-point contention into multi-point parallel access, thereby improving concurrency speed and reducing resource waste.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a single global variable is used to control thread access, then implementation is simple, but the success rate of CAS operations decreases under high concurrency

Engineering Contradiction:
Improvecontrol structureVSAvoidCAS operation success rate
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the global variable into multiple sub-areas while maintaining a relatively simple control structure. Each sub-area can be independently controlled by different thread groups, which increases the CAS operation success rate under high concurrency without significantly complicating the overall control mechanism.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4730125A1Multi-thread concurrent management method and related apparatus
Publication Date: 2026.04.22 HUAWEI TECH CO LTD
  • EP4730125A1 patent drawingFigure 1~2
  • EP4730125A1 patent drawingFigure 3
  • EP4730125A1 patent drawingFigure 4

AI summary

This application discloses a multi-thread concurrency management method and a related apparatus. The method may include: dividing a target global variable into multiple variable sub-areas, where the target global variable is used to control multiple threads to access target data, and each variable sub-area in the multiple variable sub-areas includes one or more flag bits; grouping the multiple threads into multiple thread groups, where the multiple threads are used to apply for a permission to read the target data; authorizing a target thread in a target thread group to modify a flag bit in a target variable sub-area, where one thread group in the multiple thread groups one-to-one corresponds to one variable sub-area in the multiple variable sub-areas; and if the target thread successfully modifies the flag bit, allowing the target thread to read the target data. Embodiments of this application are used in a scenario in which the multiple threads concurrently perform CAS operations, to improve a success rate of the CAS operations.