Thread Invariant Block Detection for Parallel Compiler Optimization

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Solution Overview

Problem

Conventional compiler systems for parallel processing subsystems fail to detect divergent execution scenarios in thread programs, leading to incorrect behavior and inefficient resource utilization due to their inability to identify thread invariant sections and manage execution divergence effectively.

Innovation Solution

A computer-implemented method that characterizes thread programs by optimistically marking basic blocks and instructions as convergent or divergent, using data-flow and control-dependent analysis to propagate variant and divergence attributes, allowing for automatic detection of thread invariant blocks and implementation of scalarization optimizations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional compilers execute all portions of thread program in parallel, then resource utilization within parallel processing subsystem is maximized, but incorrect behavior occurs due to undetected divergent execution scenarios

Engineering Contradiction:

Improveresource utilizationVSAvoidexecution correctness

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The compiler performs preliminary static analysis of the thread program before compilation to identify divergent execution scenarios and thread invariant sections. By analyzing control flow graphs and data dependence graphs in advance, the compiler detects potential divergence errors and marks basic blocks as convergent or divergent, preventing incorrect execution behavior while enabling optimized parallel compilation.

Inventive Principle:

Principle #10Preliminary action

2Device complexity

If conventional compilers assume thread program design is correct by construction, then compilation process is simple, but divergence errors go undetected leading to incorrect runtime behavior

Engineering Contradiction:

Improvecompilation process complexityVSAvoidthread program correctness

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The compiler implements feedback mechanisms by performing static analysis to detect divergence errors and providing information about convergent and divergent basic blocks. This feedback allows the compiler to optimize compilation while maintaining correctness, as the analysis results guide the compilation process without requiring complex runtime verification.

Inventive Principle:

Principle #23Feedback

3Productivity

If compiler schedules all portions of thread program to execute in parallel, then compilation speed is improved, but resource utilization efficiency decreases due to inability to identify thread invariant sections

Engineering Contradiction:

Improvecompilation speedVSAvoidresource utilization efficiency

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The compiler segments the thread program into distinct basic blocks and identifies which sections are thread invariant versus divergent. By segmenting the program analysis and execution planning, the compiler can schedule invariant sections for efficient parallel compilation while handling divergent sections appropriately, optimizing both compilation speed and resource utilization.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9292265B2Method for convergence analysis based on thread variance analysis

Publication Date: 2016.03.22 NVIDIA CORP

AI summary

Basic blocks within a thread program are characterized for convergence based on variance analysis or corresponding instructions. Each basic block is marked as divergent based on transitive control dependence on a block that is either divergent or comprising a variant branch condition. Convergent basic blocks that are defined by invariant instructions are advantageously identified as candidates for scalarization by a thread program compiler.