Execution Thread Issuing Circuit Lockstep Processing
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Solution Overview
Problem
Current graphics processing systems face inefficiencies in processing thread groups, particularly in graphics processing pipelines, where energy consumption is high due to frequent signal transitions caused by processing diverse data values across different execution threads.
Innovation Solution
The method involves grouping execution threads into thread groups, where multiple threads within the same group are issued to the same execution lane, allowing them to execute instructions in lockstep, thereby reducing signal transitions and energy usage by processing similar or identical data values consecutively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If execution threads are issued to different execution lanes for parallel processing, then processing speed is improved, but energy consumption increases due to frequent signal transitions
Solution Approach 1:
The patent merges multiple execution threads into thread groups that are issued to the same execution lane. By combining threads T0-T3 into a single thread group issued to execution lane 0, the system reduces the number of execution lanes actively processing threads, thereby minimizing signal transitions and energy consumption while maintaining processing throughput through efficient thread scheduling and lockstep execution within the group.
2Use of energy by moving object
If multiple threads are issued to the same execution lane, then energy consumption is reduced, but processing throughput may be limited
Solution Approach 1:
The patent ensures continuous useful action by organizing threads into groups that execute in lockstep, allowing the execution lane to maintain continuous operation without idle cycles. The thread issuing circuit continuously issues thread groups to execution lanes, and the system pipelines multiple thread groups through the execution pipeline, ensuring that the execution lane remains productively occupied while consuming less energy than if separate lanes processed individual threads.
3Device complexity
If threads execute in lockstep within thread groups, then resource sharing is improved, but flexibility in handling diverse data values is reduced
Solution Approach 1:
The patent segments the execution thread space into discrete thread groups (e.g., T0-T3 form one group, T4-T7 form another) that can be independently issued to execution lanes. This segmentation allows the system to maintain lockstep execution within each group for resource sharing efficiency, while the thread issuing circuit can select and issue different thread groups in sequence to handle diverse data values across multiple groups, thus preserving adaptability at the system level.
Data Source
AI summary
A data processor is disclosed in which groups of execution threads can execute a set of instructions in lockstep, and in which a plurality of execution lanes can perform processing operations for the execution threads. Two or more execution threads of a thread group are issued to the same execution lane for execution. The two or more execution threads can then be processed by the execution lane successively, such that the execution lane performs the same processing operation successively. This can have the effect of reducing signal transitions, such that the overall energy consumption of the data processor can be reduced.