Thread Limit Adjustment for Memory and Processing Faults
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Solution Overview
Problem
Existing computer systems face faults due to processing delays and memory shortages, which current techniques fail to adequately prevent or address effectively.
Innovation Solution
Incorporating a detection unit to monitor memory capacity utilization rates and thread processing times, and an avoidance unit that adjusts the number of threads and their waiting times to mitigate potential faults by lowering the upper limit of threads and extending waiting times when a fault is likely to occur.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of threads is increased to improve processing capacity, then productivity increases, but the risk of processing delays and faults increases
Solution Approach 1:
The patent dynamically adjusts the upper limit of threads based on real-time detection of processing delays and memory capacity utilization. When delays are detected, the system reduces the thread upper limit to prevent faults, and when delays subside, it restores the limit to maintain productivity. This dynamic adjustment resolves the contradiction by making the thread count adaptive rather than static.
Solution Approach 2:
The patent implements a feedback mechanism where the detection unit continuously monitors processing delays and memory usage, and the avoidance unit responds by adjusting thread limits accordingly. This closed-loop control system uses feedback from system performance to automatically prevent fault conditions while maintaining optimal productivity, resolving the contradiction between high thread count and fault prevention.
2Adaptability or versatility
If memory capacity is allocated to processes to improve functionality, then adaptability increases, but memory shortages and faults may occur
Solution Approach 1:
The detection unit monitors memory capacity utilization rates and provides feedback to the avoidance unit. When memory usage exceeds thresholds, the system adjusts thread limits to prevent memory exhaustion faults. This feedback mechanism maintains adaptability in memory allocation while preventing fault conditions through automatic adjustment of operational parameters.
Solution Approach 2:
The patent establishes safety thresholds for memory capacity utilization and processing delays beforehand. When these thresholds are approached, the avoidance unit proactively reduces thread limits to create a buffer that prevents actual memory shortages and faults. This prior cushioning approach maintains system adaptability while preemptively preventing unreliable states.
3Manufacturing precision
If thread processing time is extended to improve accuracy, then manufacturing precision increases, but processing delays and faults occur
Solution Approach 1:
The system dynamically adjusts the relationship between thread count and processing time. When processing delays are detected, the system reduces thread limits to allow existing threads more time for accurate processing without causing system-level faults. This dynamic balancing resolves the contradiction by making processing time allocation adaptive based on real-time system state.
4Reliability
If the upper limit of threads is reduced to prevent faults, then reliability improves, but productivity decreases
Solution Approach 1:
The patent implements dynamic adjustment of thread upper limits based on real-time system conditions. The avoidance unit reduces thread limits only when processing delays or high memory utilization are detected, and restores limits when conditions improve. This dynamic approach maintains high productivity during normal operation while ensuring reliability when faults are imminent, resolving the contradiction between constant high thread count and fault prevention.
Solution Approach 2:
The system changes the operational parameter of thread upper limit in response to detected conditions. By adjusting this parameter dynamically rather than maintaining a fixed value, the system achieves both high productivity (when limits are high) and fault prevention (when limits are reduced), resolving the contradiction between these opposing requirements.
Data Source
AI summary
An information processing device includes a detection unit and an avoidance unit. The detection unit monitors one or both of a utilization rate of memory capacity allocated to a process, and a processing time to take to process a request. The detection unit detects a state where a fault is likely to occur in the information processing device, based on the monitoring result. The avoidance unit executes fault avoidance processing when the state where the fault is likely to occur is detected. The fault avoidance processing is processing that lowers an upper limit number of threads from a standard value to a limit value that is less than the standard value, and extends a waiting time of a thread from a standard time to an extended time that is longer than the standard time.