Per-Thread Power Limiting Using a Shared Core Power Limit

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Solution Overview

Problem

New generations of integrated circuits (ICs) demand greater power control, which existing methods like clock frequency limiting and low voltage modes often compromise performance and lead to thermal issues, necessitating more effective power management techniques.

Innovation Solution

Implementing a system that measures and compares power consumption on a thread-by-thread basis, using a shared power limit derived from the total power consumption of all threads, where threads exceeding this limit are stalled while others continue without throttling, thereby maintaining performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If global mechanisms such as limiting clock frequency and operating at low voltage modes are used to control power consumption, then power consumption is reduced, but performance is compromised including unacceptable latency

Engineering Contradiction:
Improvepower consumptionVSAvoidperformance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent segments the processing workload into individual threads and measures power consumption per-thread rather than globally. This allows selective throttling of only those threads exceeding power limits, while other threads continue executing at full performance, thus resolving the contradiction between power reduction and performance maintenance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different power management policies to different threads based on their individual power consumption characteristics. Threads are monitored individually and only throttled when necessary, creating localized power control rather than uniform global throttling, which preserves overall system performance while meeting power constraints

Inventive Principle:
Principle #3Local quality

2Productivity

If new generations of ICs with higher frequency and more transistors are used to increase functionality, then processing capability is improved, but power consumption increases

Engineering Contradiction:
Improveprocessing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic power management by continuously monitoring power consumption of individual threads and adjusting their execution state in real-time. Threads are stalled only when power limits are exceeded, allowing the system to dynamically adapt between high performance and power savings based on current conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of individual threads dynamically - specifically transitioning threads between active and stalled states based on power consumption measurements. This parameter adjustment allows the system to maintain processing capability when power limits are not exceeded while reducing power consumption when limits are approached

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11287872B2Multi-thread power limiting via shared limit
Publication Date: 2022.03.29 QUALCOMM INC
  • US11287872B2 patent drawing
  • US11287872B2 patent drawing
  • US11287872B2 patent drawing

AI summary

Systems and methods for multi-thread power limiting via a shared limit estimates power consumed in a processing core on a thread-by-thread basis by counting how many power events occur in each thread. Power consumed by each thread is approximated based on the number of power events that have occurred. Power consumed by individual threads is compared to a shared power limit derived from a sum of the power consumed by all threads. Threads that are above the shared power limit are stalled while threads below the shared power limit are allowed to continue without throttling. In this fashion, the most power intensive threads are throttled to stay below the shared power limit while still maintaining performance.