Thread Scheduler for Multi-Core Thermal Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional computing devices face challenges in managing heat generated by processor cores, leading to thermal throttling, as they often rely on reactive strategies that do not effectively utilize multiple processor cores, and fail to account for resource usage and physical location of cores in relation to heat sources.
Innovation Solution
A system on chip (SOC) that assigns processing threads to cores based on operating parameters and historical use data, using a thread scheduler to proactively select cores with lower minimum operating frequencies and distances from hot spots, thereby reducing thermal throttling and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If processing threads are assigned to CPU cores based on temperature readings below a threshold, then thermal throttling is reduced, but performance is limited due to using only a few cores
Solution Approach 1:
The system performs preliminary analysis of application characteristics and historical thermal data before assigning threads to cores. By pre-characterizing applications and predicting their thermal behavior, the scheduler can proactively assign threads to optimal cores before thermal issues arise, rather than reactively responding to temperature thresholds.
Solution Approach 2:
The invention changes the scheduling parameters from simple temperature threshold readings to a comprehensive model including application characteristics, historical thermal data, and predicted future thermal states. This allows the system to consider multiple cores for thread assignment while anticipating thermal conditions, resolving the contradiction between thermal management and performance utilization.
2Productivity
If more processor cores are added to improve performance, then processing capacity increases, but thermal management complexity increases
Solution Approach 1:
The system implements self-service thermal management by automatically characterizing applications, analyzing historical data, and making scheduling decisions without external intervention. The scheduler learns from past thermal patterns and autonomously optimizes thread-to-core assignment, reducing the complexity burden despite having multiple cores.
Solution Approach 2:
The invention incorporates feedback loops where thermal performance data from multi-core operation is continuously collected and used to refine application characterizations and scheduling decisions. This feedback mechanism enables the system to adapt to thermal patterns across multiple cores, managing complexity through learned optimization rather than static rules.
3Productivity
If GPU is heavily used to process graphics, then graphics performance improves, but heat generated affects surrounding processing units
Solution Approach 1:
The system applies local quality by considering the spatial relationship between GPU and surrounding processing units when making scheduling decisions. Thread assignment to CPU cores is optimized based on which cores are thermally affected by GPU operation, allowing graphics-intensive workloads to run while protecting thermally sensitive areas from additional heat load.
4Reliability
If thermal throttling is applied to reduce SOC temperature, then heat damage is prevented, but performance is reduced
Solution Approach 1:
By pre-characterizing applications and predicting their thermal behavior before execution, the system can assign threads to cores that will not cause thermal throttling. This preliminary planning allows the SOC to maintain high performance while preventing heat damage, avoiding the need for reactive thermal throttling.
Data Source
AI summary
A system includes: a system on chip (SOC) having a plurality of cores; a first memory storing operating parameters for each of the cores; and a second memory storing historical use data for an application, wherein processing threads of the application are assigned to one or more of the plurality of cores based, at least in part, on the operating parameters for each of the cores and the historical use data.