Thread Scheduling for Heterogeneous Multi-Core Processors

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Solution Overview

Problem

Heterogeneous multi-core processors face inefficiencies in performance and power consumption due to threads with the same context being distributed across cores of different functions during heterogeneous multi-processing operations, leading to processing delays and increased power consumption.

Innovation Solution

A scheduling method that detects threads sharing the same context and migrates them to execute on high-performance cores, ensuring that threads with the same context are assigned to cores with similar functions, thereby reducing inefficiencies and optimizing performance and power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If threads with the same context are distributed across cores of different functions in heterogeneous multi-core processors, then core utilization is improved, but processing speed and power efficiency deteriorate

Engineering Contradiction:
Improvecore utilizationVSAvoidprocessing speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent applies local quality by assigning threads with the same context to cores with matching functions (high-performance threads to high-performance cores, low-performance threads to low-performance cores). This ensures that each local region (core) processes threads with appropriate performance characteristics, avoiding the speed mismatch that occurs when threads are arbitrarily distributed across heterogeneous cores.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the scheduling parameter from arbitrary core assignment to context-based core selection. The scheduler detects threads with the same context and modifies the assignment parameter to ensure they are allocated to cores with matching performance levels, thereby resolving the contradiction between utilization and processing speed.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If threads with the same context are distributed across cores of different functions, then load balancing is improved, but power consumption increases

Engineering Contradiction:
Improveload balancingVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by matching thread context characteristics with core performance characteristics. Threads requiring high performance are assigned to high-performance cores, while less demanding threads are assigned to low-performance cores. This prevents high-performance cores from being idle while low-performance cores are overloaded, achieving load balancing without excessive power consumption.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces dynamic thread migration capability that allows threads to move between cores based on runtime conditions. When a thread's context changes or performance requirements evolve, the scheduler can dynamically reassign the thread to an appropriate core, maintaining optimal load balancing and power efficiency throughout execution.

Inventive Principle:
Principle #15Dynamics

3Use of energy by moving object

If heterogeneous multi-core processors use cluster switching manner, then power efficiency is improved for specific tasks, but overall performance deteriorates during simultaneous multi-threaded operations

Engineering Contradiction:
Improvepower efficiencyVSAvoidoverall performance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent applies universality by enabling each core to handle multiple thread contexts dynamically. Instead of dedicating specific cores to specific clusters for specific task types, any core can execute any thread as long as the context matching criteria are met. This multi-functional approach allows flexible resource allocation that maintains both power efficiency and overall performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements feedback mechanisms where the scheduler continuously monitors thread execution status, context changes, and core performance metrics. Based on this feedback, the scheduler adjusts thread-to-core assignments in real-time, migrating threads between cores and clusters as needed to optimize both power efficiency and performance for the current workload mix.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9753771B2System-on-chip including multi-core processor and thread scheduling method thereof
Publication Date: 2017.09.05 SAMSUNG ELECTRONICS CO LTD
  • US9753771B2 patent drawing
  • US9753771B2 patent drawing
  • US9753771B2 patent drawing

AI summary

A scheduling method of a system-on-chip including a multi-core processor includes detecting a scheduling request of a thread to be executed in the multi-core processor, and detecting a calling thread having the same context as the scheduling-requested thread among threads that are being executed in the multi-core processor. The method includes reassigning or resetting the scheduling-requested thread according to performance of a core to execute the calling thread having the same context.