Thread State Storage Segmentation for Divergent Workloads

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Solution Overview

Problem

Existing data processing techniques face inefficiencies due to divergence in thread behavior and dynamic group reforming logic, which increases power and area costs while reducing execution efficiency, especially when threads have different data access patterns or divergent workloads.

Innovation Solution

The approach involves using processing circuitry that allocates thread state data into fixed-size storage regions with varying capacities, allowing threads with similar state data to be grouped together and migrating data between regions only when necessary, thereby reducing resource waste and eliminating the need for complex dynamic group reforming logic.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dynamic group reforming logic is used to continually review and regroup threads, then thread grouping efficiency is improved, but power consumption and area increase

Engineering Contradiction:
Improvethread grouping efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The thread state storage is segmented into multiple regions with different fixed sizes. Each region can independently store thread state data for threads with similar characteristics, eliminating the need for dynamic regrouping while maintaining grouping efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Thread state data is pre-allocated to specific storage regions based on expected thread characteristics before execution. This preliminary allocation avoids the need for runtime dynamic reforming logic, reducing power consumption while maintaining efficient thread grouping.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If dynamic group reforming logic is used to regroup threads, then thread grouping efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvethread grouping efficiencyVSAvoidlogic complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The storage structure is segmented into fixed regions, simplifying the management logic. Threads are assigned to regions based on their state characteristics, eliminating complex dynamic reforming algorithms while maintaining efficient grouping.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Thread state data is pre-allocated to appropriate storage regions before execution based on predicted thread behavior. This eliminates the need for complex runtime decision-making logic while ensuring efficient thread grouping.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If a fixed size thread group is used, then device complexity is reduced, but execution efficiency decreases when threads diverge

Engineering Contradiction:
Improvegrouping logic simplicityVSAvoidexecution efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

Different storage regions are designed with different fixed sizes to accommodate different thread group requirements. Each region can be optimized for specific thread characteristics, allowing efficient handling of both convergent and divergent workloads without requiring complex dynamic adjustment.

Inventive Principle:
Principle #3Local quality

4Loss of energy

If more threads are grouped together, then energy saving increases through amortization, but execution efficiency decreases due to workload divergence

Engineering Contradiction:
Improveenergy savingVSAvoidexecution efficiency
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

Multiple storage regions with different capacities allow threads to be grouped in sizes optimized for their specific workload characteristics. Threads with similar behavior patterns are grouped together in appropriately-sized regions, maximizing energy efficiency through amortization while maintaining high execution efficiency by avoiding excessive divergence.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9547530B2Data processing apparatus and method for processing a plurality of threads
Publication Date: 2017.01.17 ARM LTD
  • US9547530B2 patent drawing
  • US9547530B2 patent drawing
  • US9547530B2 patent drawing

AI summary

A data processing apparatus has processing circuitry for processing threads each having thread state data. The threads may be processed in thread groups, with each thread group comprising a number of threads processed in parallel with a common program executed for each thread. Several thread state storage regions are provided with fixed number of thread state entries for storing thread state data for a corresponding thread. At least two of the storage regions have different fixed numbers of entries. The processing circuitry processes as the same thread group threads having thread state data stored in the same storage region and processes threads having thread state data stored in different storage regions as different thread groups.